CSG14K_CSG8K datasheet(77/113 Pages) AMSCO

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CSG14K_CSG8K

Functional Description

Datasheet

• PUBLIC

DS000571

• v1-00 • 2020-Dec-15

112

│ 76

Sequence Length

Figure 89:

Number of Frames Register

Bank

Addr

Bits

Description

NROF_FRAMES

[7:0]

See below

In triggered internal mode (CTRL_MODE = 2), every rising edge on REQ_EXP (through external pin

or register) will initiate the capture of a sequence of frames. The value in the NROF_FRAMES register

at the moment of the rising edge on REQ_EXP will determine the sequence length.

NROF_FRAMES may be set to any value between 1 and 255. In all other control modes, the register

is ignored.

When a sequence is still active, a new rising edge on REQ_EXP will increment the remaining number

of frames by the value set in NROF_FRAMES. The total number of remaining frames may not be

higher than 255.

Shutter Lag

Figure 90:

Shutter Lag Register

Bank

Addr

Bits

Description

SHUTTER_LAG

[15:0]

See description below

PTR_EXP_0

112

[6:0]

Set differently depending on whether

the matching of the shutter lag is

enabled or disabled

Following the default configuration (see Figure 61); the shutter lag functionality is enabled, resulting in

a shutter lag delay equal to the equation below.

Equation 8:

��ℎ��_�� = ��,�� + 32 ∗ ��_��

The shutter lag matching can also be disabled:

Set the PTR_EXP_0 register to the image mode dependent value (see Figure 61)

Set the SHUTTER_LAG register to 0.

In this case, the shutter lag time becomes:

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