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CSG14K_CSG8K Datasheet(PDF) 86 Page - ams AG

Part # CSG14K_CSG8K
Description  13.8Mp_8.3Mp High Speed Global Shutter CMOS Image Sensor
PDF  113 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

CSG14K_CSG8K Datasheet(HTML) 86 Page - ams AG

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CSG14K_CSG8K
Functional Description
Datasheet
• PUBLIC
DS000571
• v1-00 • 2020-Dec-15
112
│ 85
maximal valid image width is 3856 columns, a complete row is transferred in 482 word cycles when
utilizing all outputs.
Reduced Number of Data Channels
In many applications, it is not mandatory to use all data channels (for example when reading a limited
horizontal ROI or when operating the sensor below its nominal frame rate). In these cases, it could be
interesting to use less data channels to save power consumption.
The number of DATAx_OUT channels used per side is programmable with the NR_OUTP register.
Figure 104:
Number of Outputs Registers
Reg. Name
Bank
Addr
Bits
Description
NR_OUTP
4
27
[3:0]
Number of DATAx_OUT channels to be used (per side)
MAX_NR_OUTP
0
14
[3:0]
Upper limit to number of channels to be used, in case of
context switching (per side)
DATA_CH_EN_DRIVE
4
35
[0:0]
‘0’: Disable channel driver
‘1’: Enable channel driver
The first N channels starting at DATA0_OUT are used (per side).
For example, when setting NR_OUTP to 4, DATA0_OUT to DATA3_OUT channels are used on both
top and bottom side, totaling 8 outputs. DATA4_OUT to DATA7_OUT are disabled on both sides.
All unused DATAx_OUT channels are automatically disabled, but not necessarily powered-down. To
allow on-the-fly context switching to a context with a different setting of NR_OUTP, the register
MAX_NR_OUTP must be set to the maximum setting of NR_OUTP over the different contexts.
MAX_NR_OUTP defines the number of output channels that will be powered-on. Channels above
MAX_NR_OUTP are automatically powered-down. Channels between NR_OUTP and
MAX_NR_OUTP must be individually powered-down using DATA_CH_EN_DRIVE.
The number of columns read on every output or kernel size is defined by these registers.
Figure 105:
Kernel Size Registers
Reg. Name
Bank
Addr
Bits
Description
KSIZE
4
23-24
[13:0]
Number of columns read per output
Every channel sends an equal amount of pixels per row defined by KSIZE. The last (or rightmost)
channel of the used DATAx_OUT channels pads dummy pixels after the valid pixels when needed.



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