CLRC63201TSLASH0FE datasheet(118/163 Pages) PHILIPS

118 / 163 page

Philips Semiconductors

Product Specification Rev. 3.0; May 2003

Multiple Protocol Contactless Reader IC

CL RC632

118

Confidential

If TxLastBits is unequal zero the last byte is not transmitted completely, but only the number of bits set in

TxLastBits are transmitted (starting with the least significant bit).

Thus, the internal state machine has to check the FIFO status at an earlier point in time (shown in the figure

below).

Since TxLastBits = 4 in this example, transmission stops after Bit 3 is transmitted. If configured, the frame is

completed with an EOF.

The figure above also shows a write access to the FIFOData Register right before the FIFO’s status is

checked. This leads to ‘FIFO empty’ going to 0 again and therefore ‘Accept Further Data’ stays active. The

new byte written is transmitted via the RF-interface.

‘Accept Further Data’ is changed only by the ‘Check FIFO empty’ function. This function verifies ‘FIFO empty’

one bit duration before the last expected bit transmission.

Frame Definition

Verification at:

8 Bit with Parity

th Bit

8 Bit without Parity

th Bit

x Bit without Parity

(x-1)

th Bit

FIFO Length

FIFO empty

0x01

0x00

TxLastBits = 4

TxLastBits

Bit0

Bit7 Bit0

TxData

Check FIFO empty

Accept Further Data

Bit7

Bit3 Bit4

N_WR (FIFO Data)

0x00

0x01

Bit3

Bit4

Figure 18-3: Timing for Transmitting Bit Oriented Frames

CLRC63201T/0FE Datasheet(PDF) 118 Page - NXP Semiconductors

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