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UCS1002-3 Datasheet(PDF) 29 Page - Microchip Technology

Part # UCS1002-3
Description  Programmable USB Port Power Controller with Charger Emulation
PDF  114 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

UCS1002-3 Datasheet(HTML) 29 Page - Microchip Technology

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 2023 Microchip Technology Inc. and its subsidiaries
DS20006852A-page 29
UCS1002-3
5.3.4
PWR_EN INPUT
The PWR_EN control enables the port power switch to
be turned ON if conditions are met and affects the
power state (see Table 5-2). The port power switch
cannot be closed if PWR_EN is disabled. However, if
PWR_EN is enabled, the port power switch is not nec-
essarily closed (see Section 5.1.4 “Active State
Operation”). Polarity is controlled by the SEL pin. In
SMBus mode, the PWR_EN pin state is ignored by the
UCS1002-3 if the PIN_IGN configuration bit is set (see
Section 10.4.3 “Switch Configuration Register”);
otherwise, the PWR_ENS configuration bit (see
Section 10.4.3 “Switch Configuration Register”) is
checked along with the pin.
5.3.5
LATCH INPUT
The Latch input control determines the behavior of the
fault handling mechanism (see Section 7.5 “Fault
Handling Mechanism”).
When the UCS1002-3 is configured to operate in
Stand-Alone mode (see Section 11.3 “Stand-Alone
Operating Mode”), the LATCH control is available
exclusively via the LATCH pin (see Table 11-10). When
the UCS1002-3 is configured to operate in SMBus
mode, the LATCH control is available exclusively via
the LATCH_SET configuration bit (see Section 10.4.3
“Switch Configuration Register”).
5.3.6
S0 INPUT
The S0 control enables the Attach and Removal
Detection feature and affects the power state (see
Table 5-2). When S0 is set to ‘1’, an Attach Detection
event must occur before the port power switch can be
turned ON (this statement requires PWR_EN_BEH
OTP bit is set to ‘1’). When S0 is set to ‘0’, the Attach
and Removal Detection feature is not enabled.
When the device is configured to operate in SMBus
mode (see Section 11.3 “Stand-Alone Operating
Mode”), the S0 control is available exclusively via the
S0_SET configuration bit (see Section 10.4.3 “Switch
Configuration Register”). Otherwise, the S0 control is
exclusively available via the S0 pin since the SMBus
protocol is disabled.
5.4
Discrete Output Pins
5.4.1
ALERT# AND A_DET#
OUTPUT PINS
The ALERT# pin is an active-low open-drain interrupt
to the host controller. The ALERT# pin is asserted (by
default - see ALERT_MASK in Section 10.4.1
“General Configuration Register”) when an error
occurs (see Register 10-3). The ALERT# pin can also
be asserted when the LOW_CUR (portable device is
pulling less current and may be finished charging) or
TREG (thermal regulation temperature exceeded) bits
are set and linked. As well, when charge rationing is
enabled, the ALERT# pin is asserted by default when
the current rationing threshold is reached as
determined by RATION_BEH[1:0] (see Table 7-1). The
ALERT# pin is released when all error conditions that
may assert the ALERT# pin (such as an error condition,
charge rationing, and TREG and LOW_CHG if linked)
are removed or reset as necessary.
The A_DET# pin provides an active-low open-drain
output indication that a valid Attach Detection event
has occurred. It remains asserted until the UCS1002-3
is placed into the Sleep state or a Removal Detection
event occurs. For wake on USB, the A_DET# pin
assertion can be utilized by the system. If the S0
control is ‘0’ and the UCS1002-3 is in the Active state,
the A_DET# pin is asserted regardless if a portable
device is attached or not. If S0 is '1', PWR_EN is
enabled and VS is not present, the A_DET# pin cycles
if the current draw exceeds the current capacity of the
bypass switch.
5.4.2
INTERRUPT BLANKING
The ALERT# and A_DET# pins are not asserted for a
specified time (up to tBLANK) after power-up.
Additionally, an error condition (except for the thermal
shutdown) must be present for longer than a specified
time (tMASK) before the ALERT# pin is asserted.



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