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UCS1002-3 Datasheet(PDF) 62 Page - Microchip Technology |
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UCS1002-3 Datasheet(HTML) 62 Page - Microchip Technology |
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62 / 114 page  UCS1002-3 DS20006852A-page 62 2023 Microchip Technology Inc. and its subsidiaries 10.5 Current Limit Register The Current Limit register controls the ILIM used by the port power switch. The default setting is based on the resistor on the COMM_SEL/ILIM pin and this value cannot be changed to be higher than the hardware set value. The contents of this register are retained in Sleep. 10.6 Charge Rationing Threshold Registers The Charge Rationing Threshold registers set the maximum allowed charge that is delivered to a portable device. Whenever the Total Accumulated Charge registers are updated, the value is checked against this limit. If the value meets or exceeds this limit, the RATION bit is set (see Section 10.4.1 “General Configuration Register”) and action taken according to the RATION_BEH[1:0] bits (see Section 10.4.1 “General Configuration Register”). The units are in mAh, with a range from 0 to ~181768. The contents of this register are retained in Sleep. Name Bits Address Cof Default Current Limit 8 19h R/W 00h REGISTER 10-13: CURRENT LIMIT REGISTER (ADDRESS 19h) U-x U-x U-x U-x U-x R/W-0 R/W-0 R/W-0 — — — — —ILIM_SW[2:0] bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-3 Unimplemented bit 2-0 ILIM_SW[2:0]: Sets the ILIM value as follows: 000 = 0.5A 001 = 0.9A 010 = 1.0A 011 = 1.2A 100 = 1.5A 101 = 1.8A 110 = 2.0A 111 = 2.5A Note 1: Unless otherwise indicated, the values specified above are the typical ILIM in the Table 1-2. Name Bits Address Cof Default Charge Rationing Threshold High Byte 81Ah R/W FFh Charge Rationing Threshold Low Byte 81Bh R/W FFh REGISTER 10-14: CHARGE RATIONING THRESHOLD (ADDRESS 1Ah - 1Bh) R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 CHTHR[15] CHTHR[14] CHTHR[13] CHTHR[12] CHTHR[11] CHTHR[10] CHTHR[9] CHTHR[8] bit 15 bit 8 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 CHTHR[7] CHTHR[6] CHTHR[5] CHTHR[4] CHTHR[3] CHTHR[2] CHTHR[1] CHTHR[0] bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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