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XCVU29P Datasheet(PDF) 6 Page - Advanced Micro Devices

Part # XCVU29P
Description  Virtex UltraScale FPGA Data Sheet: DC and AC Switching Characteristics
PDF  68 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

XCVU29P Datasheet(HTML) 6 Page - Advanced Micro Devices

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Table 3: DC Characteristics Over Recommended Operating Conditions (cont'd)
Symbol
Description
Min
Typ1
Max
Units
IRPU
Pad pull-up (when selected) at VIN = 0V, VCCO = 1.8V
60
–
120
µA
Pad pull-up (when selected) at VIN = 0V, VCCO = 1.5V
30
–
120
µA
Pad pull-up (when selected) at VIN = 0V, VCCO = 1.2V
10
–
100
µA
IRPD
Pad pull-down (when selected) at VIN = 1.8V
29
–
120
µA
ICCADCON
Analog supply current for the SYSMON circuits in the power-up
state
–
–
8
mA
ICCADCOFF
Analog supply current for the SYSMON circuits in the power-down
state
–
–
1.5
mA
IBATT4, 5
Battery supply current at VBATT = 1.89V
–
–
650
nA
Battery supply current at VBATT = 1.20V
–
–
150
nA
IPFS6
VCCAUX additional supply current during eFUSE programming
–
–
115
mA
Calibrated programmable on-die termination (DCI) in I/O banks7 (measured per JEDEC specification)
R9
Thevenin equivalent resistance of programmable input
termination to VCCO/2 where ODT = RTT_40
–10%8
40
+10%8
Ω
Thevenin equivalent resistance of programmable input
termination to VCCO/2 where ODT = RTT_48
–10%8
48
+10%8
Ω
Thevenin equivalent resistance of programmable input
termination to VCCO/2 where ODT = RTT_60
–10%8
60
+10%8
Ω
Programmable input termination to VCCO where ODT = RTT_40
–10%8
40
+10%8
Ω
Programmable input termination to VCCO where ODT = RTT_48
–10%8
48
+10%8
Ω
Programmable input termination to VCCO where ODT = RTT_60
–10%8
60
+10%8
Ω
Programmable input termination to VCCO where ODT = RTT_120
–10%8
120
+10%8
Ω
Programmable input termination to VCCOwhere ODT = RTT_240
–10%8
240
+10%8
Ω
Uncalibrated programmable on-die termination in HP I/Os banks (measured per JEDEC specification)
R9
Thevenin equivalent resistance of programmable input
termination to VCCO/2 where ODT = RTT_40
–50%
40
+50%
Ω
Thevenin equivalent resistance of programmable input
termination to VCCO/2 where ODT = RTT_48
–50%
48
+50%
Ω
Thevenin equivalent resistance of programmable input
termination to VCCO/2 where ODT = RTT_60
–50%
60
+50%
Ω
Programmable input termination to VCCO where ODT = RTT_40
–50%
40
+50%
Ω
Programmable input termination to VCCO where ODT = RTT_48
–50%
48
+50%
Ω
Programmable input termination to VCCO where ODT = RTT_60
–50%
60
+50%
Ω
Programmable input termination to VCCO where ODT = RTT_120
–50%
120
+50%
Ω
Programmable input termination to VCCO where ODT = RTT_240
–50%
240
+50%
Ω
Internal VREF
50% VCCO
VCCO x 0.49 VCCO x 0.50 VCCO x 0.51
V
70% VCCO
VCCO x 0.69 VCCO x 0.70 VCCO x 0.71
V
Differential termination
Programmable differential termination (TERM_100) for HP I/O
banks
–35%
100
+35%
Ω
n
Temperature diode ideality factor
–
1.026
–
–
Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics
DS923 (v1.10) April 26, 2019
www.xilinx.com
Product Specification
6
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