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L99PM60J Datasheet(PDF) 49 Page - STMicroelectronics |
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L99PM60J Datasheet(HTML) 49 Page - STMicroelectronics |
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49 / 75 page ![]() L99PM60J ST SPI Doc ID 18309 Rev 6 49/75 7.1.5 Configuration register The <Configuration> register is accessible at RAM address 3FH. The Configuration Register is implemented for compliance purpose to ST SPI Standard. <WD Trigger>: this Bit is reserved to serve the watchdog. 10 1 000 1 0 A2 VS overvoltage or VS undervoltage 10 1 000 0 1 A1 WD failure 1 0 1 0 0 0 0 1 A1 SPI error (DI stuck) 10 1 110 0 1 B9 TSD2 10 1 001 0 0 A4 V1 fail 10 1 000 0 0 A0 Other device failure(1) 1. The Global Error Flag is raised due to a failure condition which is not reported in the Global Status Register. The Failure is reported in the Status Registers 1 – 4. Table 37. Detailed global status register (continued) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Hex. L99PM60J Table 38. Configuration register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 00 00 0 0 0 WD trigger |
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