L99PM60J datasheet(52/75 Pages) STMICROELECTRONICS

Part #	L99PM60J

Description	Power management IC with LIN transceiver

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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52 / 75 page

ST SPI

L99PM60J

52/75

Doc ID 18309 Rev 6

OC0, OC1: operating code (00 for ‘write’ mode)

A0 to A5: address bits

An attempt to write 00H at RAM address 00H is recognized as a failure (SDI stuck to GND).

The device enters a failsafe state.

7.1.8

Format of data shifted out at SDO during write cycle

Failures are indicated by activating the corresponding bit of the <Global Status> register.

The returned data byte represents the previous content of the accessed register.

Figure 22.

Format of data shifted out at SDO during write cycle

Table 41.

Format of data shifted out at SDO during write cycle: global status

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Global error

flag (GEF)

Comm

error

Not (chip reset

or comm error)

TSD2 or

TSD1

V1 fail

VS fail

(OV/UV)

Fail

safe

Table 42.

Format of data shifted out at SDO during write cycle: data byte

MSB

Previous content of addressed register

LSB

L99PM60J Datasheet(PDF) 52 Page - STMicroelectronics

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