MFRC522 datasheet(17/109 Pages) NXP

17 / 109 page

112132

Product data sheet

Rev. 3.2 — 22 May 2007

17 of 109

NXP Semiconductors

MFRC522

Contactless Reader IC

9.2.1.6

DivIRqReg

Contains Interrupt Request bits

LoAlertIRq

Set to logic 1, when bit LoAlert in register Status1Reg is set. In opposition to

LoAlert, LoAlertIRq stores this event and can only be reset as indicated by bit

Set1.

ErrIRq

Set to logic 1 if any error bit in the ErrorReg Register is set.

TimerIRq

Set to logic 1 when the timer decrements the TimerValue Register to zero.

Table 16:

Description of CommIRqReg bits …continued

All bits in the register CommIRqReg shall be cleared by software.

Bit

Symbol

Description

Table 17:

DivIRqReg register (address 05h); reset value: X0h

Bit

Symbol

Set2

MfinActIRq

CRCIRq

Access

Rights

wRFU

RFU

Table 18:

Description of DivIRqReg bits

All bits in the register DivIRqReg shall be cleared by software.

Bit

Symbol

Description

Set2

Set to logic 1, Set2 defines that the marked bits in the register

DivIRqReg are set.

Set to logic 0, Set2 defines, that the marked bits in the register

DivIRqReg are cleared

6 to 5

Reserved for future use.

MfinActIRq

Set to logic 1, when MFIN is active. This interrupt is set when either a

rising or falling signal edge is detected.

Reserved for future use.

CRCIRq

Set to logic 1, when the CRC command is active and all data are

processed.

1 to 0

Reserved for future use.

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