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MFRC522 Datasheet(PDF) 40 Page - NXP Semiconductors |
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MFRC522 Datasheet(HTML) 40 Page - NXP Semiconductors |
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40 / 109 page  112132 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 3.2 — 22 May 2007 40 of 109 NXP Semiconductors MFRC522 Contactless Reader IC 9.2.4.2 TestSel1Reg General test signal configuration. 9.2.4.3 TestSel2Reg General test signal configuration and PRBS control Table 105: TestSel1Reg register (address 31h); reset value: 00h Bit 7 6 5 4 3 2 1 0 Symbol - TstBusBitSel Access Rights RFU r/w Table 106: Description of TestSel1Reg bits Bit Symbol Description 7 to 3 - Reserved for future use. 2 to 0 TstBusBitSel Select the TestBus bit from the testbus to be propagated to MFOUT. Table 107: TestSel2Reg register (address 32h); reset value: 00h Bit 7 6 5 4 3 2 1 0 Symbol TstBusFlip PRBS9 PRBS15 TestBusSel Access Rights r/w r/w r/w r/w Table 108: Description of TestSel2Reg bits Bit Symbol Description 7 TstBusFlip If set to logic 1, the testbus is mapped to the parallel port by the following order: TstBusBit4,TstBusBit3, TstBusBit2,TstBusBit6,TstsBusBit5, TstBusBit0. See Section 19 “Testsignals”. 6 PRBS9 Starts and enables the PRBS9 sequence according ITU-TO150. Remark: All relevant registers to transmit data have to be configured before entering PRBS9 mode. The data transmission of the defined sequence is started by the send command. 5 PRBS15 Starts and enables the PRBS15 sequence according ITU-TO150. Remark: All relevant registers to transmit data have to be configured before entering PRBS15 mode. The data transmission of the defined sequence is started by the send command. 4 to 0 TestBusSel Selects the testbus. See Section 19 “Testsignals” |
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