MFRC522 datasheet(67/109 Pages) NXP

67 / 109 page

112132

Product data sheet

Rev. 3.2 — 22 May 2007

67 of 109

NXP Semiconductors

MFRC522

Contactless Reader IC

13. Timer Unit

A timer unit is implemented in the MFRC522. The external host may use this timer to

manage timing relevant tasks. The timer unit may be used in one of the following

configurations:

• Time-out counter

• Watch-dog counter

• Stop watch

• Programmable one-shot

• Periodical trigger

The timer unit can be used to measure the time interval between two events or to indicate

that a specific event occurred after a specific time. The timer can be triggered by events

which will be explained in the following, but the timer itself does not influence any internal

event (e.g. A time-out during data reception does not influence the reception process

automatically). Furthermore, several timer related bits are set and these bits can be used

to generate an interrupt.

The timer has an input clock of 6.78 MHz (derived from the 27.12 MHz quartz). The timer

consists of two stages: 1 prescaler and 1 counter.

The prescaler is a 12 bit counter. The reload value for TPrescaler can be defined between

0 and 4095 in register TModeReg and TPrescalerReg.

The reload value for the counter is defined by 16 bits in a range of 0 to 65535 in the

The current value of the timer is indicated by the register TCounterValReg.

If the counter reaches 0 an interrupt will be generated automatically indicated by setting

the TimerIRq bit in the register CommonIRqReg. If enabled, this event can be indicated on

the IRQ line. The bit TimerIRq can be set and reset by the host. Depending on the

configuration the timer will stop at 0 or restart with the value in register TReloadReg.

The status of the timer is indicated by bit TRunning in register Status1Reg.

The timer can be manually started by TStartNow in register ControlReg or manually

stopped by TStopNow in register ControlReg.

Furthermore the timer can be activated automatically by setting the bit TAuto in the

The time delay of a timer stage is the reload value +1.

Maximum time: TPrescaler = 4095, TReloadVal = 65535

=> 4096

× 65536/6.78 MHz = 39.59 s

Example:

To indicate 100 us it is required to count 678 clock cycles. This means the value for

TPrescaler has to be set to TPrescaler = 677.The timer has now an input clock of

100 us. The timer can count up to 65535 timeslots of each 100 us.

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