MFRC522 datasheet(30/109 Pages) NXP

30 / 109 page

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Product data sheet

Rev. 3.2 — 22 May 2007

30 of 109

NXP Semiconductors

MFRC522

Contactless Reader IC

9.2.2.9

RxThresholdReg

Selects thresholds for the bit decoder.

9.2.2.10

DemodReg

Defines demodulator settings.

Table 55:

RxThresholdReg register (address 18h); reset value: 84h

Bit

Symbol

MinLevel

CollLevel

Access

Rights

r/w

RFU

r/w

Table 56:

Description of RxThresholdReg bits

Bit

Symbol

Description

7 to 4

MinLevel

Defines the minimum signal strength at the decoder input that shall be

accepted. If the signal strength is below this level, it is not evaluated.

Reserved for future use.

2 to 0

CollLevel

Defines the minimum signal strength at the decoder input that has to be

reached by the weaker half-bit of the Manchester-coded signal to

generate a bit-collision relatively to the amplitude of the stronger half-bit.

Table 57:

DemodReg register (address 19h); reset value: 4Dh

Bit

Symbol

AddIQ

FixIQ

TauRcv

TauSync

Access

Rights

r/w

RFU

r/w

Table 58:

Description of DemodReg bits

Bit

Symbol

Description

7 to 6

AddIQ

Defines the use of I and Q channel during reception

Remark: FixIQ has to be set to logic 0 to enable the following settings.

Value

Description

Select the stronger channel

Select the stronger channel and freeze the selected during

communication

Reserved

FixIQ

If set to logic 1 and the bits AddIQ are set to X0b, the reception is fixed to

I channel.

If set to logic 1 and the bits AddIQ are set to X1b, the reception is fixed to

Q channel.

Reserved for future use.

3 to 2

TauRcv

Changes the time constant of the internal PLL during data reception.

Remark: If set to 00b, the PLL is frozen during data reception.

1 to 0

TauSync

Changes the time constant of the internal PLL during burst.

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