MFRC522 datasheet(52/109 Pages) NXP

52 / 109 page

112132

Product data sheet

Rev. 3.2 — 22 May 2007

52 of 109

NXP Semiconductors

MFRC522

Contactless Reader IC

10.4 I2C Bus Interface

An Inter IC (I2C) bus interface is supported to enable a low cost, low pin count serial bus

interface to the host. The implemented I2C interface is implemented according the NXP

Semiconductors I2C interface specification, rev. 2.1, January 2000. The implemented

interface can only act in Slave mode. Therefore no clock generation and access

arbitration is implemented in the MFRC522.

10.4.1 General

The implemented interface is conform to the I2C-bus specification version 2.1,

January 2000. The MFRC522 can act as a slave receiver or slave transmitter in Standard

mode, Fast mode and High-speed mode.

SDA is a bi-directional line, connected to a positive supply voltage via a current-source or

a pull-up resistor. Both lines SDA and SCL are set to HIGH level if no data is transmitted.

The MFRC522 has a tri-state output stage to perform the wired-AND function. Data on the

I2C-bus can be transferred at data rates of up to 100 kbit/s in Standard mode, up to

400 kbit/s in the Fast mode or up to 3.4 Mbit/s in the High-speed mode.

If the I2C interface is selected, a spike suppression according to the I2C interface

specification on SCL and SDA is activated.

For timing requirements refer to Section 23.9 “I2C Timing”

Fig 11. I2C interface.

pullup

network

pullup

network

SDA

SCL

I2C

configuration

wiring

RC522

D[1..6]

MFRC522 Datasheet(PDF) 52 Page - NXP Semiconductors