RIVA128ZX datasheet(62/85 Pages) STMICROELECTRONICS

62 / 85 page

128-BIT 3D MULTIMEDIA ACCELERATOR

RIVA128ZX

62/85

Figure 68.

Interface to monitor or television

Monitor detection

Figure 68 shows the typical connection of a televi-

sion or computer monitor to the RIVA128ZXs’

DAC outputs. The RIVA128ZX expects only one

output display device to be connected at a time

and does not support simultaneous output to both

the monitor and television.

During system initialization, the BIOS detects if a

monitor is connected by sensing the doubly-termi-

nated 75

Ω load (net 37.5Ω). When no monitor is

connected, only the local 75

Ω load is detected and

the RIVA128ZX switches to television output

mode. The BIOS sets the CRTC registers to gen-

erate the appropriate timing for the local television

standard and the DACs are adjusted to compen-

sate for the single 75

Ω load.

Monitor mode is always selected if a monitor is de-

tected since it is assumed to be the output device

of choice, having a higher display fidelity than tele-

vision.

Timing generation

Televisions contain two Phase-Locked Loops

(PLLs). One PLL locks the horizontal frequency

and is used to synchronize horizontal and vertical

flyback, and to keep the active video region stable

and centered. The second PLL locks the color

subcarrier frequency (NTSC 3.5794545MHz or

PAL 4.43361875MHz). The color subcarrier is

used as a phase reference to extract the color in-

formation from the television signal.

The RIVA128ZX encodes horizontal and vertical

timing on a composite sync signal. Using a

13.5000MHz reference clock, the RIVA128ZX tim-

ing generator creates ITU-R-601 NTSC and PAL

compliant horizontal timing with only ppm (parts

per million) error. The RIVA128ZX does not use

the color subcarrier clock internally. The reference

clock source can be located on the television up-

grade module with the video encoder and TV out-

put connectors, thus lowering the base system

cost.

Flicker filter

RIVA128ZX provides an optional flicker filtering

feature for TV and interlaced displays.

Without flicker filtering, elements of an image

present on either the odd or the even field, but not

both, are seen to flicker or shimmer obtrusively.

This is a problem especially with 1-pixel-wide hor-

izontal lines often originating from computer gen-

erated GUI displays.

Flicker filtering causes a slight smearing of pixels

in the vertical direction. This trades off image qual-

ity versus flicker. The displayed pixel contains a

proportion of the data for the pixel on that line, plus

a smaller proportion of the data of the equivalent

pixel on the line above and on the line below.

Overall, the proportions add up to 1 so that the

brightness of the screen does not alter and the pix-

el data does not get clipped.

Flicker filtering only takes place on pixel data from

the framestore - the pattern written into the cursor

already has flicker removed. No flicker removal is

performed on video images.

Overscan and underscan

The RIVA128ZX supports overscan and under-

scan in the horizontal and vertical directions using

hardware scaling. Underscan allows 640x480 res-

olution to fit onto NTSC displays and 800x600 res-

olution to fit onto PAL displays. Scaling can be ad-

justed and controlled by software to suit specific

TV requirements. The TV output image position is

also software controllable.

RIVA128ZX

Monitor

Y/C

TV RGB

Encoder

PAL/NTSC

Television

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