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RIVA128ZX Datasheet(PDF) 83 Page - STMicroelectronics |
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RIVA128ZX Datasheet(HTML) 83 Page - STMicroelectronics |
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83 / 85 page ![]() 128-BIT 3D MULTIMEDIA ACCELERATOR RIVA128ZX 83/85 Byte offsets 0x63 - 0x60 Power Management Capabilities Register (0x63 - 0x60) 0x63 0x62 0x61 0x60 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98 76543 210 Bits Function RW I 31:19 Reserved R- 0 18:16 VERSION indicates that RIVA128ZX is compliant with Revision 1.0 of the PCI Power Management Interface Specification. R- 1 15:8 NEXT_PTR indicates the offset for the next item in the capability list. If the power-on reset configuration Host Interface bit indicates PCI then NEXT_PTR will be null (0x00), indicating there are no further items. If the power-on reset configuration indicates AGP then NEXT_PTR will indicate the next item’s off- set (the AGP capability, 0x44). R- X 7:0 A value of ‘1’ read back from CAP_ID indicates this is the Power Management Register. R- 1 |
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