RIVA128ZX datasheet(82/85 Pages) STMICROELECTRONICS

Part #	RIVA128ZX

Description	128-BIT 3D MULTIMEDIA ACCELERATOR

PDF	85 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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82 / 85 page

128-BIT 3D MULTIMEDIA ACCELERATOR

RIVA128ZX

82/85

Byte offsets 0x4F - 0x4C

AGP Command Register (0x4F - 0x4C = CAP_PTR + 8)

0x4F

0x4E

0x4D

0x4C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

76543

210

Bits

Function

RW I

31:24

This field is set to the minimum request depth of the target as reported in its

RQ field.

RW -

23:10

Reserved

R- 0

SBA_ENABLE enables sideband addressing when set. The RIVA128ZX does

not implement sideband addressing.

R- 0

AGP_ENABLE allows the RIVA128ZX to act as an AGP master and initiate

AGP operations. The target must be enabled before enabling the RIVA128ZX

0 = disabled

1 = AGP operations enabled

RW 0

7:3

Reserved

R- 0

2:0

The DATA_RATE field must be set to 0x01 to indicate 66MHz /1x transfer

mode or 0x02 for 133MHz/2x transfer mode. This value must also be set on

the target before being enabled. The initial value 0x00 indicates PCI opera-

tion.

R W 0x00

RIVA128ZX Datasheet(PDF) 82 Page - STMicroelectronics