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7643 Datasheet(PDF) 415 Page - Renesas Technology Corp

Part # 7643
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  424 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7643 Datasheet(HTML) 415 Page - Renesas Technology Corp

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background image
Addressing mode
Symbol
Function
Details
IMP
IMM
A
BIT, A
ZP
BIT, ZP
OP n# OP n# OP n# OP n# OP n#
OP n
#
Rev.2.00
Aug 28, 2006
page 92 of 98
7643 Group
REJ09B0133-0200
APPENDIX
3.7 Machine instructions
When T = 0, this instruction subtracts the
value of M and the complement of C from A,
and stores the results in A and C.
When T = 1, the instruction subtracts the con-
tents of M and the complement of C from the
contents of M(X), and stores the results in
M(X) and C.
A remain unchanged, but status flag are
changed.
M(X) represents the contents of memory
where is indicated by X.
This instruction sets the designated bit i of A
or M.
This instruction sets C.
This instruction set D.
This instruction set I.
This instruction set T.
This instruction stores the contents of A in M.
The contents of A does not change.
This instruction resets the oscillation control F/
F and the oscillation stops. Reset or interrupt
input is needed to wake up from this mode.
This instruction stores the contents of X in M.
The contents of X does not change.
This instruction stores the contents of Y in M.
The contents of Y does not change.
This instruction stores the contents of A in X.
The contents of A does not change.
This instruction stores the contents of A in Y.
The contents of A does not change.
This instruction tests whether the contents of
M are “0” or not and modifies the N and Z.
This instruction transfers the contents of S in
X.
This instruction stores the contents of X in A.
This instruction stores the contents of X in S.
This instruction stores the contents of Y in A.
The WIT instruction stops the internal clock
but not the oscillation of the oscillation circuit
is not stopped.
CPU starts its function after the Timer X over
flows (comes to the terminal count). All regis-
ters or internal memory contents except Timer
X will not change during this mode. (Of course
needs VDD).
SBC
(Note 1)
(Note 7)
SEB
SEC
SED
SEI
SET
STA
STP
STX
STY
TAX
TAY
TST
TSX
TXA
TXS
TYA
WIT
When T = 0
_
A
← A – M – C
When T = 1
_
M(X)
← M(X) – M – C
Ai or Mi
← 1
C
← 1
D
← 1
I
← 1
T
← 1
M
← A
M
← X
M
← Y
X
← A
Y
← A
M = 0?
X
← S
A
← X
S
← X
A
← Y
85
86
84
64
3
3
3
3
2
2
2
2
E9 2
2
0B
+
20i
0F
+
20i
11
52
E5 3
2
38
F8
78
32
1
1
2
1
1
1
1
1
42
AA
A8
BA
8A
9A
98
C2
2
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1



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