R5F2L3ACBNFP datasheet(161/848 Pages) RENESAS

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8. Bus

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 125 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

However, only the following SFRs are connected with the 16-bit bus:

Interrupts: Each interrupt control register

Timer RC: Registers TRC, TRCGRA, TRCGRB, TRCGRC, and TRCGRD

Timer RD: Registers TRDi (i = 0 or 1), TRDGRAi, TRDGRBi, TRDGRCi, and TRDGRDi

Timer RG: Registers TRG, TRGGRA, and TRGGRB

SSU: Registers SSTDR, SSTDRH, SSRDR, and SSRDRH

UART2: Registers U2MR, U2BRG, U2TB, U2C0, U2C1, U2RB, U2SMR5, U2SMR4, U2SMR3, U2SMR2,

and U2SMR

A/D converter: Registers AD0, AD1, AD2, AD3, AD4, AD5, AD6, AD7, ADMOD, ADINSEL, ADCON0,

and ADCON1

D/A converter: Registers DA0 and DA1

Address match interrupt: Registers RMAD0, AIER0, RMAD1, and AIER1

Therefore, they are accessed once in 16-bit units. The bus operation is the same as “Area: SFR, Data flash, Even

address Byte Access” in Table 8.2 Access Units and Bus Operations, and 16-bit data is accessed at a time.

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