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OMAP3530-HiRel Datasheet(PDF) 47 Page - Texas Instruments

Part # OMAP3530-HiRel
Description  OMAP3525-HiRel and OMAP3530-HiRel Applications Processors
PDF  239 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530-HiRel Datasheet(HTML) 47 Page - Texas Instruments

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OMAP3525-HiRel and OMAP3530-HiRel Applications Processors
www.ti.com
SPRS599 – JUNE 2009
Table 2-2. Ball Characteristics (CBC Pkg.) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER
HYS
BUFFER
PULLUP
IO
BOTTOM
TOP
NAME
[5]
[6]
RESET
RESET
REL.
[10]
[11]
STRENG
/DOWN
CELL
[1]
[2]
[4]
STATE
REL.
MODE
TH
TYPE
[14]
[7]
STATE
[9]
(mA)
[13]
[8]
[12]
hsusb1_dir
3
I
gpio_22
4
IO
hsusb1_tll_dir
6
O
hw_dbg10
7
O
V2
-
etk_d9
0
O
L
L
4
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
sys_secure_indicator
1
O
mmc3_dat5
2
IO
hsusb1_nxt
3
I
gpio_23
4
IO
mm1_rxdm
5
IO
hsusb1_tll_nxt
6
O
hw_dbg11
7
O
AE4
-
etk_d10
0
O
L
L
4
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
uart1_rx
2
I
hsusb2_clk
3
O
gpio_24
4
IO
hsusb2_tll_clk
6
O
hw_dbg12
7
O
AF6
-
etk_d11
0
O
L
L
4
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
hsusb2_stp
3
O
gpio_25
4
IO
mm2_rxdp
5
IO
hsusb2_tll_stp
6
I
hw_dbg13
7
O
AE6
-
etk_d12
0
O
L
L
4
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
hsusb2_dir
3
I
gpio_26
4
IO
hsusb2_tll_dir
6
O
hw_dbg14
7
O
AF7
-
etk_d13
0
O
L
L
4
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
hsusb2_nxt
3
I
gpio_27
4
IO
mm2_rxdm
5
IO
hsusb2_tll_nxt
6
O
hw_dbg15
7
O
AF9
-
etk_d14
0
O
L
L
4
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
hsusb2_data0
3
IO
gpio_28
4
IO
mm2_rxrcv
5
IO
hsusb2_tll_data0
6
IO
hw_dbg16
7
O
AE9
-
etk_d15
0
O
L
L
4
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
hsusb2_data1
3
IO
gpio_29
4
IO
mm2_txse0
5
IO
hsusb2_tll_data1
6
IO
hw_dbg17
7
O
Y15
-
jtag_emu0
0
IO
H
H
0
vdds_io
Yes
4
PU100/
LVCMOS
PD100
gpio_11
4
IO
safe_mode
7
-
Y14
-
jtag_emu1
0
IO
H
H
0
vdds_io
Yes
4
PU100/
LVCMOS
PD100
gpio_31
4
IO
safe_mode
7
-
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TERMINAL DESCRIPTION
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