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OMAP3530-HiRel Datasheet(PDF) 77 Page - Texas Instruments |
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OMAP3530-HiRel Datasheet(HTML) 77 Page - Texas Instruments |
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77 / 239 page ![]() OMAP3525-HiRel and OMAP3530-HiRel Applications Processors www.ti.com SPRS599 – JUNE 2009 Table 2-17. Serial Communication Interfaces – USB Signals Description SIGNAL NAME DESCRIPTION TYPE(1) BALL BOTTOM BALL BOTTOM (CBB Pkg.) (CBC Pkg.) HIGH-SPEED UNIVERSAL SERIAL BUS INTERFACE (HSUSB0) hsusb0_clk Dedicated for external transceiver 60-MHz clock input from I T28 W19 PHY hsusb0_stp Dedicated for external transceiver Stop signal O T25 U20 hsusb0_dir Dedicated for external transceiver Data direction control from I R28 V19 PHY hsusb0_nxt Dedicated for external transceiver Next signal from PHY I T26 W18 hsusb0_data0 Dedicated for external transceiver Bidirectional data bus IO T27 V20 hsusb0_data1 Dedicated for external transceiver Bidirectional data bus IO U28 Y20 hsusb0_data2 Dedicated for external transceiver Bidirectional data bus IO U27 V18 hsusb0_data3 Dedicated for external transceiver Bidirectional data bus IO U26 W20 hsusb0_data4 Dedicated for external transceiver Bidirectional data bus IO U25 W17 additional signals for 12-pin ULPI operation hsusb0_data5 Dedicated for external transceiver Bidirectional data bus IO V28 Y18 additional signals for 12-pin ULPI operation hsusb0_data6 Dedicated for external transceiver Bidirectional data bus IO V27 Y19 additional signals for 12-pin ULPI operation hsusb0_data7 Dedicated for external transceiver Bidirectional data bus IO V26 Y17 additional signals for 12-pin ULPI operation MM_FSUSB3 mm3_rxdm Vminus receive data (not used in 3- or 4-pin configurations) IO AE3 AE3 mm3_rxdp Vplus receive data (not used in 3- or 4-pin configurations) IO AH3 M3 mm3_rxrcv Differential receiver signal input (not used in 3-pin mode) IO AD1 U4 mm3_txse0 Single-ended zero. Used as VM in 4-pin VP_VM mode. IO AE1 V3 mm3_txdat USB data. Used as VP in 4-pin VP_VM mode. IO AD2 R3 mm3_txen_n Transmit enable IO AC1 T3 MM_FSUSB2 mm2_rxdm Vminus receive data (not used in 3- or 4-pin configurations) IO AH7 AF7 mm2_rxdp Vplus receive data (not used in 3- or 4-pin configurations) IO AF7 AF6 mm2_rxrcv Differential receiver signal input (not used in 3-pin mode) IO AG8 AF9 mm2_txse0 Single-ended zero. Used as VM in 4-pin VP_VM mode. IO AH8 AE9 mm2_txdat USB data. Used as VP in 4-pin VP_VM mode. IO AB2 T8 mm2_txen_n Transmit enable IO V3 V9 MM_FSUSB1 mm1_rxdm Vminus receive data (not used in 3- or 4-pin configurations) IO AG9 V2 mm1_rxdp Vplus receive data (not used in 3- or 4-pin configurations) IO AF10 AB2 mm1_rxrcv Differential receiver signal input (not used in 3-pin mode) IO AF11 AC3 mm1_txse0 Single-ended zero. Used as VM in 4-pin VP_VM mode. IO AG12 AD4 mm1_txdat USB data. Used as VP in 4-pin VP_VM mode. IO AH12 AD3 mm1_txen_n Transmit enable IO AH14 AD2 HSUSB3_TLL hsusb3_tll_clk Dedicated for external transceiver 60-MHz clock input from O W8 W2 PHY hsusb3_tll_stp Dedicated for external transceiver Stop signal I AH3 M3 hsusb3_tll_dir dedicated for external transceiver Data direction control from O AF3 L3 PHY hsusb3_tll_nxt Dedicated for external transceiver Next signal from PHY O AE3 K3 hsusb3_tll_data0 Dedicated for external transceiver Bidirectional data bus IO AD1 U4 (1) Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog) Submit Documentation Feedback TERMINAL DESCRIPTION 77 |
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