OMAP3530-HiRel datasheet(91/239 Pages) TI

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2.4.9

System and Miscellaneous Terminals

OMAP3525-HiRel and OMAP3530-HiRel Applications Processors

www.ti.com

SPRS599 – JUNE 2009

Table 2-27. System and Miscellaneous Signals Description

SIGNAL NAME

DESCRIPTION

TYPE(1)

BALL

BALL TOP

BALL

BALL TOP

BOTTOM

(CBB Pkg.)

BOTTOM

(CBC Pkg.)

(CBB Pkg.)

(CBC Pkg.)

sys_32k

32-kHz clock input

AE25

AE20

sys_xtalin

Main input clock. Oscillator input or LVCMOS at

AE17

AF19

19.2, 13, or 12 MHz.

sys_xtalout

Output of oscillator

AF17

AF20

sys_altclk

Alternate clock source selectable for GPTIMERs

J25

J23

(maximum 54 MHz), USB (48 MHz), or

NTSC/PAL (54 MHz)

sys_clkreq

Request from OMAP3525/30 device for system

AF25

W15

clock (open source type)

sys_clkout1

Configurable output clock1

AG25

AE14

sys_clkout2

Configurable output clock2

AE22

W11

sys_boot0

Boot configuration mode bit 0

AH26

sys_boot1

Boot configuration mode bit 1

AG26

sys_boot2

Boot configuration mode bit 2

AE14

sys_boot3

Boot configuration mode bit 3

AF18

sys_boot4

Boot configuration mode bit 4

AF19

sys_boot5

Boot configuration mode bit 5

AE21

sys_boot6

Boot configuration mode bit 6

AF21

sys_nrespwron

Power On Reset

AH25

V13

sys_nreswarm

Warm Boot Reset (open drain output)

IOD

AF24

AD7

sys_nirq

External FIQ input

AF26

V16

sys_nvmode1

Indicates the voltage mode

AD26

AD15

sys_nvmode2

Indicates the voltage mode

AE26

W16

sys_off_mode

Indicates the voltage mode

AF22

V12

sys_ndmareq0

External DMA request 0 (system expansion).

Level (active low) or edge (falling) selectable.

sys_ndmareq1

External DMA request 1 (system expansion).

T8 / J8

B4 / C6

Level (active low) or edge (falling) selectable.

sys_ndmareq2

External DMA request 2 (system expansion).

L3 / R8

D1 / C4

Level (active low) or edge (falling) selectable.

sys_ndmareq3

External DMA request 3 (system expansion).

K3 / P8

D2 / B5

Level (active low) or edge (falling) selectable.

sys_secure_

MSECURE transactions indicator

AG9

indicator

sys_drm_

MSECURE output

AF9

AA4

msecure

sys_ipmcsws(2)

Reserved

sys_opmcsws(2)

Reserved

pop_int0_ft(3)

POP dedicated control signal

AG11

AB9

AF10

pop_int1_ft(3)

POP dedicated control signal

AH11

AC9

AE2

pop_tq_temp_

POP dedicated control signal

AH16

AC14

AF14

AA12

sense_ft(3)

(1)

Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog)

(2)

sys_ipmcsws and sys_opmcsws pins must be left unconnected.

(3)

Top feed-through pop_int0_ft, pop_int1_ft are routed as feed-through for loopback to a GPIO to detect the POP OneNAND die event

and respond accordingly. Top pop_tq_temp_sense_ft is routed as feed-through for loopback to a GPIO to monitor the temperature of the

POP DDR. Top pop_reset_rp_ft is typically looped back to sys_nreswarm to reset the flash memories when a warm reset event occurs

on the processor side.

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