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OMAP3530-HiRel Datasheet(PDF) 75 Page - Texas Instruments

Part # OMAP3530-HiRel
Description  OMAP3525-HiRel and OMAP3530-HiRel Applications Processors
PDF  239 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530-HiRel Datasheet(HTML) 75 Page - Texas Instruments

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OMAP3525-HiRel and OMAP3530-HiRel Applications Processors
www.ti.com
SPRS599 – JUNE 2009
Table 2-14. Serial Communication Interfaces – McBSP LP Signals Description (continued)
SIGNAL NAME
DESCRIPTION
TYPE(1)
BALL BOTTOM
BALL BOTTOM
(CBB Pkg.)
(CBC Pkg.)
mcbsp1_fsx
Transmit frame synchronization
IO
K26
P20
mcbsp_clks
External clock input (shared by McBSP1, 2,
I
T21
T19
3, 4, and 5)
MULTICHANNEL SERIAL (McBSP LP 2)
mcbsp2_dr
Received serial data
I
R21
T18
mcbsp2_dx
Transmitted serial data
IO
M21
R19
mcbsp2_clkx
Combined serial clock
IO
N21
R18
mcbsp2_fsx
Combined frame synchronization
IO
P21
U18
MULTICHANNEL SERIAL (McBSP LP 3)
mcbsp3_dr
Received serial data
I
AE6 / AB25 / U21
T20 / AA24 / N3
mcbsp3_dx
Transmitted serial data
IO
AF6 / AB26 / V21
U17 / Y24 / P3
mcbsp3_clkx
Combined serial clock
IO
AF5 / AA25 / W21
T17 / AD22 / U3
mcbsp3_fsx
Combined frame synchronization
IO
AE5 / AD25 / K26
P20 / AD21 / W3
MULTICHANNEL SERIAL (McBSP LP 4)
mcbsp4_dr
Received serial data
I
R8 / AD1
C4 / U4
mcbsp4_dx
Transmitted serial data
IO
P8 / AD2
B5 / R3
mcbsp4_clkx
Combined serial clock
IO
T8 / AE1
B4 / V3
mcbsp4_fsx
Combined frame synchronization
IO
N8 / AC1
C5 / T3
MULTICHANNEL SERIAL (McBSP LP 5)
mcbsp5_dr
Received serial data
I
AE11
Y3
mcbsp5_dx
Transmitted serial data
IO
AF13
AE3
mcbsp5_clkx
Combined serial clock
IO
AF10
AB2
mcbsp5_fsx
Combined frame synchronization
IO
AH9
AB1
Table 2-15. Serial Communication Interfaces – McSPI Signals Description
SIGNAL NAME
DESCRIPTION
TYPE(1)
BALL BOTTOM
BALL BOTTOM
(CBB Pkg.)
(CBC Pkg.)
MULTICHANNEL SERIAL PORT INTERFACE (McSPI1)
mcspi1_clk
SPI Clock
IO
AB3
P9
mcspi1_simo
Slave data in, master data out
IO
AB4
P8
mcspi1_somi
Slave data out, master data in
IO
AA4
P7
mcspi1_cs0
SPI Enable 0, polarity configured by
IO
AC2
R7
software
mcspi1_cs1
SPI Enable 1, polarity configured by
O
AC3
R8
software
mcspi1_cs2
SPI Enable 2, polarity configured by
O
AB1
R9
software
mcspi1_cs3
SPI Enable 3, polarity configured by
O
AB2
T8
software
(1)
Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog)
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TERMINAL DESCRIPTION
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