SPMCK16Z4MPV20 datasheet(420/500 Pages) FREESCALE

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M68HC16 Z SERIES

D-46

USER’S MANUAL

DDQS7 determines the direction of PQS7 only when the SCI transmitter is disabled.

When the SCI transmitter is enabled, PQS7 is the TXD output.

D.6.10 QSPI Control Register 0

SPCR0 contains parameters for configuring the QSPI and enabling various modes of

operation. SPCR0 must be initialized before QSPI operation begins. Writing a new val-

ue to SPCR0 while the QSPI is enabled disrupts operation.

MSTR — Master/Slave Mode Select

0 = QSPI is a slave device.

1 = QSPI is the system master.

Table D-34 Effect of DDRQS on QSM Pin Function

QSM Pin

Mode

DDRQS Bit

Bit State

Pin Function

MISO

Master

DDQS0

Serial data input to QSPI

Disables data input

Slave

Disables data output

Serial data output from QSPI

MOSI

Master

DDQS1

Disables data output

Serial data output from QSPI

Slave

Serial data input to QSPI

Disables data input

SCK1

NOTES:

1. PQS2 is a digital I/O pin unless the SPI is enabled (SPE set in SPCR1), in which case it

becomes the QSPI serial clock SCK.

Master

DDQS2

—

Clock output from QSPI

Slave

—

Clock input to QSPI

PCS0/SS

Master

DDQS3

Assertion causes mode fault

Chip-select output

Slave

QSPI slave select input

Disables slave select Input

PCS[1:3]

Master

DDQS[4:6]

Disables chip-select output

Chip-select outputs enabled

Slave

No effect

TXD2

2. PQS7 is a digital I/O pin unless the SCI transmitter is enabled (TE set in SCCR1), in

which case it becomes the SCI serial data output TXD.

—

DDQS7

Serial data output from SCI

RXD

—

None

Serial data input to SCI

SPCR0 — QSPI Control Register 0

$YFFC18

MSTR

WOMQ

BITS[3:0]

CPOL

CPHA

SPBR[7:0]

RESET:

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