OR3LP26B datasheet(79/184 Pages) AGERE

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Lucent Technologies Inc.

Data Sheet

ORCA OR3LP26B FPSC

March 2000

Embedded Master/Target PCI Interface

Lucent Technologies Inc.

PCI Bus Core Detailed Description Quad Port (continued)

Table 25. Bit Definitions on FPGA/PCI Core Interface

* Command Codes (codes correspond to PCI bus command codes):

0000 Not Used (interrupt acknowledge not implemented)

0001 Not Used (special cycle not implemented)

0010 I/O Read

0011 I/O Write

0100 Reserved (per PCI specification)

0101 Reserved (per PCI specification)

0110 Memory Read

0111 Memory Write

1000 Reserved (per PCI specification)

1001 Reserved (per PCI specification)

1010 Configuration Read

1011 Configuration Write

1100 Memory Read Multiple

1101 Not Used (dual address operation is indicated via separate signal)

1110 Memory Read Line

1111 Memory Write and Invalidate

Bits

Name

Description

A. Quad-Port Master Write (Lower Address Cycle)

mstatecntr = 0

mwdata[35]

Holding address register selector:

0 = select HR0

1 = select HR1

mwdata[34]

Dual address indicator (active-high)

mwdata[33:32]

—

Unused

mwdata[31:0]

A1 & A0

Address words 1 and 0

mcmd[3:0]

mcmd

Master command opcode*

B. Quad-Port Master Write (Upper Address Cycle)

mstatecntr = 1

mwdata[35:32]

—

Unused

mwdata[31:0]

A3 & A2

Address words 3 and 2

mcmd[3:0]

—

Unused

C. Quad-Port Master Write, Lower Data DWORD

mstatecntr = 4

mwdata[35:32]

BE3—BE0

Byte enables (active-low)

mwdata[31:0]

D3—D0

Data bytes 3 to 0

D. Quad-Port Master Write, Upper Data DWORD

mstatecntr = 5

mwdata[35:32]

BE7—BE4

Byte enables (active-low)

mwdata[31:0]

D7—D4

Data bytes 7 to 4

E. Quad-Port Master Read (16-Bit Address Cycle)

mstatecntr = 0

mwdata[35]

Holding address register selector:

0 = select HR0

1 = select HR1

mwdata[34]

Dual address indicator (active-high)

mwdata[33]

SPL = 1

Burst length source

0 = use new burst length

1 = use burst length of previous operation, and

only 16-bit address is supplied

mwdata[32]

—

Unused

mwdata[31:24]

MRd_BenN

Byte enables (active-low)

mwdata[23:16]

—

Unused

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