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AN4043 Datasheet(PDF) 19 Page - STMicroelectronics |
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AN4043 Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 60 page ![]() AN4043 Electrical characteristics and functions Doc ID 022726 Rev 2 19/60 2.3.2 High voltage level shift The built-in high voltage level shift allows direct connection between the low voltage control inputs and the high voltage power half bridge in any power application up to 600 V. It is obtained thanks to the BCD offline technology which integrates, in the same die bipolar devices, low and medium voltage CMOS for analog and logic circuitry and high voltage DMOS transistors with a breakdown voltage in excess of 600 V. This key feature eliminates the need for external optocouplers, resulting in significant savings regarding component count and power losses. Other advantages are high-frequency operation and short input-to- output delays. 2.3.3 Undervoltage lockout The SLLIMM-nano supply voltage VCC is continuously monitored by an undervoltage lockout (UVLO) circuitry which turns off the gate driver outputs when the supply voltage goes below the VCC_thOFF threshold specified on the datasheet, and turns on the IC when the supply voltage goes above the VCC_thON voltage. A hysteresis of about 1.5 V is provided for noise rejection purposes. The high voltage floating supply Vboot is also provided with a similar undervoltage lockout circuitry. When the driver is in UVLO condition, both gate driver outputs are set to low level, setting the half bridge power stage output to high impedance. The timing chart of undervoltage lockout, plotted in Figure 12, is based on the following steps: ● t1: when the VCC supply voltage raises the VCC_thON threshold, the gate driver starts to work after the next input signal HIN/LIN is on. The circuit state becomes RESET ● t2: input signal HIN/LIN is on and the IGBT is turned on ● t3: when the VCC supply voltage goes below the VCC_thOFF threshold, the UVLO event is detected. The IGBT is turned off in spite of input signal HIN/LIN. The state of the circuit is now SET ● t4: the gate driver re-starts once the VCC supply voltage again raises the VCC_thON threshold ● t5: input signal HIN/LIN is on and the IGBT is turned on again. Table 6. Integrated pull-up/down resistor values Input pin PN Input pin logic Internal pull-up Internal pull-down High-side gate driving HINU, HINV, HINW STGIPN3H60A Active high 500 k Ω Low-side gate driving LINU, LINV, LINW STGIPN3H60A Active high 500 k Ω High-side gate driving HINU, HINV, HINW STGIPN3H60 Active high 85 k Ω Low-side gate driving LINU, LINV, LINW STGIPN3H60 Active low 720 k Ω SD / OD shutdown STGIPN3H60 Active low 125 k Ω |
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