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PIC18F010 Datasheet(PDF) 119 Page - Microchip Technology

Part # PIC18F010
Description  High Performance Microcontrollers
PDF  176 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F010 Datasheet(HTML) 119 Page - Microchip Technology

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 2001 Microchip Technology Inc.
Preliminary
DS41142A-page 117
PIC18F010/020
INCFSZ
Increment f, skip if 0
Syntax:
[ label ]
INCFSZ f [ ,d [,a] ]
Operands:
0
≤ f ≤ 255
d
∈ [0,1]
a
∈ [0,1]
Operation:
(f) + 1
→ dest,
skip if result = 0
Status Affected:
None
Encoding:
0011
11da
ffff
ffff
Description:
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in WREG. If ’d’ is 1, the
result is placed back in register ’f’
(default).
If the result is 0, the next instruc-
tion, which is already fetched, is
discarded, and a NOP is executed
instead making it a two-cycle
instruction. If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, the Bank
will be selected as per the BSR
value.
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ’f’
Process
Data
Write to
destination
If skip:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Example:
HERE
INCFSZ
CNT
NZERO
:
ZERO
:
Before Instruction
PC
=
Address (HERE)
After Instruction
CNT
=
CNT + 1
If CNT
=
0;
PC =
Address(ZERO)
If CNT
≠
0;
PC =
Address(NZERO)
INFSNZ
Increment f, skip if not 0
Syntax:
[label]
INFSNZ f [, d [,a] ]
Operands:
0
≤ f ≤ 255
d
∈ [0,1]
a
∈ [0,1]
Operation:
(f) + 1
→ dest,
skip if result
≠ 0
Status Affected:
None
Encoding:
0100
10da
ffff
ffff
Description:
The contents of register 'f' are
incremented. If 'd' is 0, the result is
placed in WREG. If 'd' is 1, the
result is placed back in register 'f'
(default).
If the result is not 0, the next
instruction, which is already
fetched, is discarded, and a NOP is
executed instead making it a two-
cycle instruction. If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1, the
Bank will be selected as per the
BSR value.
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ’f’
Process
Data
Write to
destination
If skip:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Example:
HERE
INFSNZ
REG
ZERO
NZERO
Before Instruction
PC
=
Address (HERE)
After Instruction
REG
=
REG + 1
If REG
≠
0;
PC =
Address (NZERO)
If REG
=
0;
PC =
Address (ZERO)



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