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PIC18LC658T-E/CL Datasheet(PDF) 104 Page - Microchip Technology |
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PIC18LC658T-E/CL Datasheet(HTML) 104 Page - Microchip Technology |
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104 / 366 page ![]() PIC18CXX8 DS30475A-page 104 Advanced Information 2000 Microchip Technology Inc. 8.8 PORTH, LATH, and TRISH Registers PORTH is a 5-bit wide, bi-directional port available only on the PIC18C858 devices. The corresponding Data Direction register is TRISH. Setting a TRISH bit (=1) will make the corresponding PORTH pin an input (i.e., put the corresponding output driver in a hi-impedance mode). Clearing a TRISH bit (=0) will make the corre- sponding PORTH pin an output (i.e., put the contents of the output latch on the selected pin). Read-modify-write operations on the LATH register read and write the latched output value for PORTH. Pins RH0-RH3 on the PIC18C858 are bi-directional I/O pins with ST input buffers. Pins RH4-RH7 on all devices are multiplexed with A/D converter inputs. FIGURE 8-16: RH3:RH0 PINS BLOCK DIAGRAM EXAMPLE 8-8: INITIALIZING PORTH FIGURE 8-17: RH7:RH4 PINS BLOCK DIAGRAM Note: This port is available on PIC18C858. Note: On a Power-on Reset, the RH7:RH4 pins are configured as inputs and read as ’0’. Data Bus WR LATH WR TRISH RD Data Latch TRIS Latch RD TRISH Schmitt Trigger Q D Q CK QD EN Q D Q CK P N VDD VSS PORTH I/O Pin or WR PORTH RD LATH Note: I/O pins have diode protection to VDD and VSS. CLRF PORTH ; Initialize PORTH by ; clearing output ; data latches CLRF LATH ; Alternate method ; to clear output ; data latches MOVLW 0x0F ; MOVWF ADCON1 ; MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISH ; Set RH3:RH0 as inputs ; RH5:RH4 as outputs ; RH7:RH6 as inputs Data Bus Q D Q CK Q D Q CK QD EN P N WR LATH WR TRISH Data Latch TRIS Latch RD TRISH RD PORTH VSS VDD I/O Pin Analog Input Mode ST Input Buffer To A/D Converter RD LATH or WR PORTH Note: I/O pins have diode protection to VDD and VSS. |
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