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TTP259-ASFN Datasheet(PDF) 71 Page - Tontek Design Technology |
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TTP259-ASFN Datasheet(HTML) 71 Page - Tontek Design Technology |
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71 / 81 page  Preliminary TTP259 TonTouch TM 2015/05/25 Page 71 of 81 Ver: 1.1 TPINTC[01EH]: Touch pad interrupt control register [R/W], default value [0000] TPINTC Bit3 Bit2 Bit1 Bit0 Bit Name TPCTIE TPCMPIE - - Read/Write R/W R/W - - TPCMPIE: Capacitor overcharge interrupt enable. (0: disable; 1: enable) TPCTIE: Duty counter overflow interrupt enable. (0: disable; 1: enable) TPINTF[01FH]: Touch pad request flag register [R/W], default value [0000] TPINTF Bit3 Bit2 Bit1 Bit0 Bit Name TPCTF TPCMF - - Read/Write R/W R/W - - TPCMPF: Capacitor overcharge flag. (0: inactive; 1: active) TPCTF: Duty counter overflow flag. (0: inactive; 1: active) TPCT0[215H]: Touch pad duty counter and latch data register 0 [R], default value [xxxx] Register Bit3 Bit2 Bit1 Bit0 Bit Name TPCT3/CT3 TPCT2/CT2 TPCT1/CT1 TPCT0/CT0 Read/Write R/W R/W R/W R/W TPCT3~TPCT0: Duty counter 1st nibble data for counter read. CT3~CT0: 1st nibble of reload latch data. TPCT1[216H]: Touch pad duty counter and latch data register 1 [R], default value [xxxx] Register Bit3 Bit2 Bit1 Bit0 Bit Name TPCT7/CT7 TPCT6/CT6 TPCT5/CT5 TPCT4/CT4 Read/Write R/W R/W R/W R/W TPCT7~TPCT4: Duty counter 2nd nibble data for counter read. CT7~CT4: 2nd nibble of reload latch data. TPCT2[217H]: Touch pad duty counter and latch data register 2 [R], default value [xxxx] Register Bit3 Bit2 Bit1 Bit0 Bit Name TPCT11/CT11 TPCT10/CT10 TPCT9/CT9 TPCT8/CT8 Read/Write R/W R/W R/W R/W TPCT11~TPCT8: Duty counter 3rd nibble data for counter read. CT11~CT8: 3rd nibble of reload latch data. |
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