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TTP259-ASFN Datasheet(PDF) 40 Page - Tontek Design Technology |
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TTP259-ASFN Datasheet(HTML) 40 Page - Tontek Design Technology |
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40 / 81 page ![]() Preliminary TTP259 TonTouch TM 2015/05/25 Page 40 of 81 Ver: 1.1 Read/Write R/W R/W R/W R/W PWM2D7~PWM2D4: PWM2 duty middle nibble data. PWM2H[22FH]: PWM2 duty high nibble data register [R/W], default value [xxxx] Register Bit3 Bit2 Bit1 Bit0 Bit Name PWM2D11 PWM2D10 PWM2D9 PWM2D8 Read/Write R/W R/W R/W R/W PWM2D11~PWM2D8: PWM2 duty high nibble data. TC P2 C N T Du ty CM P PW M x E N PW M x 4-bit du ty L 8-bit du ty M and H T M P du ty M and H WR PW M x L WR PW M x H an d PW M x M PW M x O 12-bit du ty TC P2 O V PWMxD PWM duty Note 0 (0 * clock cycle) / TCP2 timer’s period All off 1 (1 * clock cycle) / TCP2 timer’s period 2 (2 * clock cycle) / TCP2 timer’s period …… …… n ((n) * clock cycle) / TCP2 timer’s period …… …… TCP2D ((TCP2D) * clock cycle) / TCP2 timer’s period All on Note: 1. PWMxD can not bigger than TCP2D 2. TCP2 timer’s period = (TCP2D) * clock cycle. 3. PWM can start 0 or start 1 by mask option. Table: PWM duty Figure: PWM (TCP2) |
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