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TTP259-ASFN Datasheet(PDF) 20 Page - Tontek Design Technology

Part # TTP259-ASFN
Description  Preliminary
PDF  81 Pages
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Manufacturer  TONTEK [Tontek Design Technology]
Direct Link  http://www.tontek.com.tw
Logo TONTEK - Tontek Design Technology

TTP259-ASFN Datasheet(HTML) 20 Page - Tontek Design Technology

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Preliminary
TTP259
TonTouch
TM
2015/05/25
Page 20 of 81
Ver: 1.1
.Watch Dog Timer reset
The reset signal will generate automatically when the watch dog timer
runs overflow. If the watch dog timer is cleared regularly by users’ program,
no watch dog timer reset will occur. Unless the MCU is forced into abnormal
state, the software controlled procedure is disrupted and causing watch
dog timer overflow, then it will generate reset signal to initializes the chip
returning to normal operation.
.Low voltage reset (LVR)
The LVR function is used to monitor the supply voltage of MCU, it will
generate a reset signal (with 4 OSCL de-bounce time) to reset the
microcontroller as the VDD power falls below the default setting level VLVR.
It can also be enabled or disabled by programming LVREN bit in LVREN
register. User writes $5 to LVREN register, LVREN bit is set to 1 and enable
LVR function. User writes $A to LVREN register, LVREN bit is clear to 0 and
disable LVR function. If user writes other value to LVREN register, it can’t
change LVREN bit.
.Burn out reset (Program sequence abnormal)
As CPU out of program area, the CPU can detect the abnormal
condition and generate a system reset request.
.ROM fail reset
As ROM fail, the CPU can detect the abnormal condition and generate
a system reset request.
RESETF[300H]: Reset source flag register [R/W], power on value [0000]
Register
Bit3
Bit2
Bit1
Bit0
Bit Name
ROMF
BOF
LVRF
WDTF
Read/Write
R/W
R/W
R/W
R/W
WDTF: Watch dog timer overflow reset flag. (0: no active; 1: active)
LVRF: Low voltage reset flag. (0: no active; 1: active)
BOF: Burn out flag. (0: no active; 1: active)
ROMF: ROM fail flag. (0: no active; 1: active)
Note: The RESETF is only cleared by power on reset and external reset.



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