COP8CCR9IMT7SLASHNOPB datasheet(25/111 Pages) TI1

25 / 111 page

COP8CBR9, COP8CCR9, COP8CDR9

www.ti.com

SNOS535I – OCTOBER 2000 – REVISED MARCH 2013

Bit 2

= 1

WATCHDOG feature disabled. G1 is a general purpose I/O.

= 0

WATCHDOG feature enabled. G1 pin is WATCHDOG output with weak pullup.

Bit 1

= 1

HALT mode disabled.

= 0

HALT mode enabled.

Bit 0

= 1

Execution following RESET will be from Flash Memory.

= 0

Flash Memory is erased. Execution following RESET will be from Boot ROM with the

MICROWIRE/PLUS ISP routines.

The COP8 assembler defines a special ROM section type, CONF, into which the Option Register data

may be coded. The Option Register is programmed automatically by programmers that are certified by TI.

The user needs to ensure that the FLEX bit will be set when the device is programmed.

The following examples illustrate the declaration of the Option Register.

Syntax:

[label:].sect

config, conf

.db

value

;1 byte,

;configures

;options

.endsect

Example: The following sets a value in the Option Register and User Identification for a COP8CBR9HVA7.

The Option Register bit values shown select options: Security disabled, WATCHDOG enabled HALT

mode enabled and execution will commence from Flash Memory.

.chip

8CBR

.sect

option, conf

.db

0x01

;wd, halt, flex

.endsect

...

.end

start

Note: All programmers certified for programming this family of parts will support programming of the

Option Register. Please contact TI or your device programmer supplier for more information.

5.6

SECURITY

The device has a security feature which, when enabled, prevents external reading of the Flash program

memory. The security bit in the Option Register determines, whether security is enabled or disabled. If the

security feature is disabled, the contents of the internal Flash Memory may be read by external

programmers or by the built in MICROWIRE/PLUS serial interface ISP. Security must be enforced by

the user when the contents of the Flash Memory are accessed via the user ISP or Virtual EEPROM

capability.

If the security feature is enabled, then any attempt to externally read the contents of the Flash Memory will

result in the value FF (hex) being read from all program locations (except the Option Register). In addition,

with the security feature enabled, the write operation to the Flash program memory and Option Register is

inhibited. Page Erases are also inhibited when the security feature is enabled. The Option Register is

readable regardless of the state of the security bit by accessing location FFFF (hex). Mass Erase

Operations are possible regardless of the state of the security bit.

The security bit can be erased only by a Mass Erase of the entire contents of the Flash unless Flash

operation is under the control of User ISP functions.

Functional Description

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Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9

COP8CCR9IMT7/NOPB Datasheet(PDF) 25 Page - Texas Instruments

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