COP8CCR9IMT7SLASHNOPB datasheet(31/111 Pages) TI1

31 / 111 page

COP8CBR9, COP8CCR9, COP8CDR9

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SNOS535I – OCTOBER 2000 – REVISED MARCH 2013

Table 5-2. Startup Times

CKI Frequency

Startup Time

10 MHz

1–10 ms

3.33 MHz

3–10 ms

1 MHz

3–20 ms

455 kHz

10–30 ms

32 kHz (low speed oscillator)

2–5 sec

5.8.2

Clock Doubler

This device contains a frequency doubler that doubles the frequency of the oscillator selected to operate

the main microcontroller core. The details of how to select either the high speed oscillator or low speed

oscillator are described in, Power Saving Features. When the high speed oscillator connected to CKI

operates at 10 MHz, the internal clock frequency is 20 MHz, resulting in an instruction cycle time of 0.5 µs.

When the 32 kHz oscillator connected to L0 and L1 is selected, the internal clock frequency is 64 kHz,

resulting in an instruction cycle of 152.6 µs. The output of the clock doubler is called MCLK and is

referenced in many places within this document.

5.9

CONTROL REGISTERS

5.9.1

CNTRL Register (Address X

′00EE)

T1C3

T1C2

T1C1

T1C0

MSEL

IEDG

SL1

SL0

Bit 7

Bit 0

The Timer1 (T1) and MICROWIRE/PLUS control register contains the following bits:

T1C3

Timer T1 mode control bit

T1C2

Timer T1 mode control bit

T1C1

Timer T1 mode control bit

T1C0

Timer T1 Start/Stop control in timer modes 1 and 2. T1 Underflow Interrupt Pending Flag in

timer mode 3

MSEL

Selects G5 and G4 as MICROWIRE/PLUS signals SK and SO respectively

IEDG

External interrupt edge polarity select (0 = Rising edge, 1 = Falling edge)

SL1 & SL0 Select the MICROWIRE/PLUS clock divide by (00 = 2, 01 = 4, 1x = 8)

5.9.2

PSW Register (Address X

′00EF)

T1PNDA

T1ENA

EXPND

BUSY

EXEN

GIE

Bit 7

Bit 0

The PSW register contains the following select bits:

Half Carry Flag

Carry Flag

T1PNDA

Timer T1 Interrupt Pending Flag (Autoreload RA in mode 1, T1 Underflow in Mode 2, T1A

capture edge in mode 3)

T1ENA

Timer T1 Interrupt Enable for Timer Underflow or T1A Input capture edge

EXPND

External interrupt pending

Functional Description

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