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COP8CCR9IMT7/NOPB Datasheet(PDF) 96 Page - Texas Instruments |
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COP8CCR9IMT7/NOPB Datasheet(HTML) 96 Page - Texas Instruments |
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96 / 111 page  COP8CBR9, COP8CCR9, COP8CDR9 SNOS535I – OCTOBER 2000 – REVISED MARCH 2013 www.ti.com Reset Pending Bit (RPND) 5.19.4.8 Conditional Instructions The conditional instruction test a condition. If the condition is true, the next instruction is executed in the normal manner; if the condition is false, the next instruction is skipped. If Equal (IFEQ) If Not Equal (IFNE) If Greater Than (IFGT) If Carry (IFC) If Not Carry (IFNC) If Bit (IFBIT) If B Pointer Not Equal (IFBNE) And Skip if Zero (ANDSZ) Decrement Register and Skip if Zero (DRSZ) 5.19.4.9 No-Operation Instruction The no-operation instruction does nothing, except to occupy space in the program memory and time in execution. No-Operation (NOP) NOTE The VIS is a special case of the Indirect Transfer of Control addressing mode, where the double byte vector associated with the interrupt is transferred from adjacent addresses in the program memory into the program counter (PC) in order to jump to the associated interrupt service routine. 5.19.5 REGISTER AND SYMBOL DEFINITION The following abbreviations represent the nomenclature used in the instruction description and the COP8 cross-assembler. Registers A 8-Bit Accumulator Register B 8-Bit Address Register X 8-Bit Address Register S 8-Bit Segment Register SP 8-Bit Stack Pointer Register PC 15-Bit Program Counter Register PU Upper 7 Bits of PC PL Lower 8 Bits of PC C 1 Bit of PSW Register for Carry HC 1 Bit of PSW Register for Half Carry GIE 1 Bit of PSW Register for Global Interrupt Enable VU Interrupt Vector Upper Byte VL Interrupt Vector Lower Byte 96 Functional Description Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9 |
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