COP8CCR9IMT7SLASHNOPB datasheet(35/111 Pages) TI1

35 / 111 page

COP8CBR9, COP8CCR9, COP8CDR9

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SNOS535I – OCTOBER 2000 – REVISED MARCH 2013

As described in Option Register, there is a bit, FLEX, that controls whether the device exits RESET

executing from the flash memory or the Boot ROM. The user must program the FLEX bit as appropriate

for the application. In the erased state, the FLEX bit = 0 and the device will power-up executing from Boot

ROM. When FLEX = 0, this assumes that either the MICROWIRE/PLUS ISP routine or external

programming is being used to program the device. If using the MICROWIRE/PLUS ISP routine, the

software in the boot ROM will monitor the MICROWIRE/PLUS for commands to program the flash

memory. When programming the flash program memory is complete, the FLEX bit will have to be

programmed to a 1 and the device will have to be reset, either by pulling external Reset to ground or by a

MICROWIRE/PLUS ISP EXIT command, before execution from flash program memory will occur.

If FLEX = 1, upon exiting Reset, the device will begin executing from location 0000 in the flash program

memory. The assumption, here, is that either the application is not using ISP, is using MICROWIRE/PLUS

ISP by jumping to it within the application code, or is using a customized ISP routine. If a customized ISP

routine is being used, then it must be programmed into the flash memory by means of the

MICROWIRE/PLUS ISP or external programming as described in the preceding paragraph.

5.10.3 REGISTERS

There are six registers required to support ISP: Address Register Hi byte (ISPADHI), Address Register

Low byte (ISPADLO), Read Data Register (ISPRD), Write Data Register (ISPWR), Write Timing Register

(PGMTIM), and the Control Register (ISPCNTRL). The ISPCNTRL Register is not available to the user.

5.10.3.1 ISP Address Registers

The address registers (ISPADHI & ISPADLO) are used to specify the address of the byte of data being

written or read. For page erase operations, the address of the beginning of the page should be loaded.

For mass erase operations, 0000 must be placed into the address registers. When reading the Option

cleared to 00 on Reset. These registers can be loaded from either flash program memory or Boot ROM

and must be maintained for the entire duration of the operation.

NOTE

The actual memory address of the Option Register is 7FFF (hex), however the

MICROWIRE/PLUS ISP routines require the address FFFF (hex) to be used to read the

Option Register when the Flash Memory is secured.

Table 5-3. High Byte of ISP Address

ISPADHi

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Addr 15

Addr 14

Addr 13

Addr 12

Addr 11

Addr 10

Addr 9

Addr 8

Table 5-4. Low Byte of ISP AddressThis table assumes that the control flag

MSEL is set.

ISPADLO

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Addr 7

Addr 6

Addr 5

Addr 4

Addr 3

Addr 2

Addr 1

Addr 0

5.10.3.2 ISP Read Data Register

The Read Data Register (ISPRD) contains the value read back from a read operation. This register can be

accessed from either flash program memory or Boot ROM. This register is undefined on Reset.

Functional Description

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COP8CCR9IMT7/NOPB Datasheet(PDF) 35 Page - Texas Instruments

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