DS2196 datasheet(11/157 Pages) DALLAS

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DS2196

11 of 157

SYMBOL

TYPE

FUNCTION

TCLKOB

Transmit Clock Output from Formatter B.

DVSS

–

Digital Signal Ground.

DVDD

–

Digital Positive Supply. 3.3V (±5%).

TCLKOA

Transmit Clock Output from Formatter A.

TNEGOA /

TFSYNCA

Transmit Negative Data Output from Formatter A /

Transmit Frame Sync Pulse Output from Formatter A.

TPOSOA /

TNRZA

Transmit Positive Data Output / Transmit NRZ Data Output from

Formatter A.

TSERA

Transmit Serial Data Input for Formatter A.

TCLKA

Transmit Clock Input for Formatter A.

TSYNCA

I/O

Transmit Frame & Multiframe Pulse for/from Formatter A.

TCHCLKA /

TLCLKA

Transmit DS0 Channel Clock Output from Formatter A /

Transmit FDL Link Clock Output from Formatter A.

TCHBLKA /

TLINKA

I/O

Transmit Channel Blocking Clock Output from Formatter A /

Transmit FDL Link Data Input for Formatter A.

MUX

Bus Operation. 0 = Non-Mux Bus / 1 = Mux Bus Operation.

D0 / AD0

I/O

Data Bus Bit 0 / Address/Data Bus Bit 0. LSB.

D1 / AD1

I/O

Data Bus Bit 1 / Address/Data Bus Bit 1.

D2 / AD2

I/O

Data Bus Bit 2 / Address/Data Bus Bit 2.

D3 / AD3

I/O

Data Bus Bit 3 / Address/Data Bus Bit 3.

D4 / AD4

I/O

Data Bus Bit 4 / Address/Data Bus Bit 4.

D5 / AD5

I/O

Data Bus Bit 5 / Address/Data Bus Bit 5.

D6 / AD6

I/O

Data Bus Bit 6 / Address/Data Bus Bit 6.

D7 / AD7

I/O

Data Bus Bit 7 / Address/Data Bus Bit 7. MSB.

DVSS

–

I/O Digital Signal Ground.

DVDD

–

I/O Digital Positive Supply. 3.3V (±5%).

Address Bus Bit 0. LSB.

Address Bus Bit 1

Address Bus Bit 2

Address Bus Bit 3

Address Bus Bit 4

Address Bus Bit 5

Address Bus Bit 6

A7 / ALE(AS)

Address Bus Bit 7 / Address Latch Enable (Address Strobe). MSB.

RD*(DS*)

Read Input (Data Strobe).

CS*

Chip Select. Active Low Signal.

WR*(R/W*)

Write Input (Read/Write).

RCHBLKA /

RLINKA

Receive Channel Blocking Clock Output from Framer A /

Receive FDL Link Data Output from Framer A.

RCHCLKA /

RLCLKA

Receive DS0 Channel Clock Output from Framer A /

Receive FDL Link Clock Output from Framer A.

RCLKIA

Receive Clock Input for Framer A.

RPOSIA

Receive Positive & NRZ Data Input for Framer A.

RNEGIA

Receive Negative & NRZ Data Input for Framer A.

RCLKA

Receive Clock Output from Framer A.

RSERA

Receive Serial Data Output from Framer A.

RMSYNCA

Receive Multiframe Pulse from Framer A.

RFSYNCA

Receive Frame Pulse from Framer A.

RLOSA/

LOTCA

Receive Loss Of Synchronization from Framer A /

Loss of Transmit Clock Framer A.

DS2196 Datasheet(PDF) 11 Page - Dallas Semiconductor

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