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LP87322E/F Datasheet(PDF) 16 Page - Texas Instruments |
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LP87322E/F Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 75 page  UVLO SW Reset Digital Logic Registers I2C Enable/ Disable, Delay Control Slew-Rate Control Interrupts nINT SDA SCL EN VANA OTP EPROM Thermal Monitor Oscillator Buck0 ILIM Det Pwrgood Det Overload and SC Det Buck1 LDO0 LDO1 ILIM Det Pwrgood Det Overload and SC Det ILIM Det Pwrgood Det Overload and SC Det ILIM Det Pwrgood Det Overload and SC Det Ref & Bias Iload ADC Iload ADC CLKIN (GPO2) PGOOD GPO Copyright © 2016, Texas Instruments Incorporated 16 LP87322B-Q1, LP87322D-Q1, LP87322E-Q1, LP87322F-Q1 SNVSAC5 – SEPTEMBER 2017 www.ti.com Product Folder Links: LP87322B-Q1 LP87322D-Q1 LP87322E-Q1 LP87322F-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 DC-DC Converters 8.3.1.1 Overview The LP87322B/D/E/F-Q1 includes two step-down DC-DC converter cores. The cores are designed for flexibility; most of the functions are programmable, thus giving a possibility to optimize the regulator operation for each application. The buck regulators deliver 0.7-V to 3.36-V regulated voltage rails from a 2.8-V to 5.5-V supply voltage. The LP87322B/D/E/F-Q1 has the following features: • DVS support with programmable slew rate • Automatic mode control based on the loading (PFM or PWM mode) • Forced PWM mode option • Optional external clock input to minimize crosstalk • Optional spread-spectrum technique to reduce EMI • Phase control for optimized EMI • Synchronous rectification • Current mode loop with PI compensator • Soft start • Power Good flag with maskable interrupt |
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