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LP87322E/F Datasheet(PDF) 51 Page - Texas Instruments |
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LP87322E/F Datasheet(HTML) 51 Page - Texas Instruments |
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51 / 75 page  51 LP87322B-Q1, LP87322D-Q1, LP87322E-Q1, LP87322F-Q1 www.ti.com SNVSAC5 – SEPTEMBER 2017 Product Folder Links: LP87322B-Q1 LP87322D-Q1 LP87322E-Q1 LP87322F-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Bits Field Type Default Description 7 Reserved R/W 0 6 LDO1_PG_INT R/W 0 Latched status bit indicating that LDO1 Power-Good event has been detected. Write 1 to clear. 5 LDO1_SC_INT R/W 0 Latched status bit indicating that the LDO1 output voltage has been over 1 ms below short-circuit threshold level. Write 1 to clear. 4 LDO1_ILIM_INT R/W 0 Latched status bit indicating that the LDO1 output current limit has been active. Write 1 to clear. 3 Reserved R/W 0 2 LDO0_PG_INT R/W 0 Latched status bit indicating that LDO0 Power-Good event has been detected. Write 1 to clear. 1 LDO0_SC_INT R/W 0 Latched status bit indicating that the LDO0 output voltage has been over 1 ms below short-circuit threshold level. Write 1 to clear. 0 LDO0_ILIM_INT R/W 0 Latched status bit indicating that the LDO0 output current limit has been active. Write 1 to clear. 8.6.1.30 TOP_STAT Address: 0x1D D7 D6 D5 D4 D3 D2 D1 D0 PGOOD_STAT Reserved SYNC_CLK _STAT TDIE_SD _STAT TDIE_WARN _STAT OVP_STAT Reserved Bits Field Type Default Description 7 PGOOD_STAT R 0 Status bit indicating the status of PGOOD pin: 0 - PGOOD pin is inactive 1 - PGOOD pin is active 6:5 Reserved R 00 4 SYNC_CLK_STAT R 0 Status bit indicating the status of external clock (CLKIN): 0 - External clock frequency is valid 1 - External clock frequency is not valid. 3 TDIE_SD_STAT R 0 Status bit indicating the status of thermal shutdown: 0 - Die temperature below thermal shutdown level 1 - Die temperature above thermal shutdown level. 2 TDIE_WARN _STAT R 0 Status bit indicating the status of thermal warning: 0 - Die temperature below thermal warning level 1 - Die temperature above thermal warning level. 1 OVP_STAT R 0 Status bit indicating the status of input overvoltage monitoring: 0 - Input voltage below overvoltage threshold level 1 - Input voltage above overvoltage threshold level. 0 Reserved R 0 8.6.1.31 BUCK_STAT Address: 0x1E D7 D6 D5 D4 D3 D2 D1 D0 BUCK1_STAT BUCK1_PG _STAT Reserved BUCK1_ILIM _STAT BUCK0_STAT BUCK0_PG _STAT Reserved BUCK0_ILIM _STAT Bits Field Type Default Description 7 BUCK1_STAT R 0 Status bit indicating the enable/disable status of Buck1: 0 - Buck1 regulator is disabled 1 - Buck1 regulator is enabled. 6 BUCK1_PG_STAT R 0 Status bit indicating Buck1 output voltage validity (raw status) 0 - Buck1 output voltage is valid. 1 - Buck1 output voltage is invalid. |
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