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LP87322E/F Datasheet(PDF) 11 Page - Texas Instruments |
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LP87322E/F Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 75 page ![]() 11 LP87322B-Q1, LP87322D-Q1, LP87322E-Q1, LP87322F-Q1 www.ti.com SNVSAC5 – SEPTEMBER 2017 Product Folder Links: LP87322B-Q1 LP87322D-Q1 LP87322E-Q1 LP87322F-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Electrical Characteristics (continued) Limits apply over the junction temperature range –40°C ≤ TJ ≤ +140°C, specified VVANA, VVIN_Bx, VVIN_LDOx, VVOUT_Bx, VVOUT_LDOx and IOUT range, unless otherwise noted. Typical values are at TJ = 25°C, VVANA = VVIN_Bx = VVIN_LDOx = 3.7 V, and VOUT = 1 V, unless otherwise noted (1) (2). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Standby current consumption, regulators disabled 9 µA Active current consumption, one buck regulator enabled in Auto mode, internal RC oscillator, PGOOD monitoring enabled IOUT_Bx = 0 mA, not switching 58 µA Active current consumption, two buck regulators enabled in Auto mode, internal RC oscillator, PGOOD monitoring enabled IOUT_Bx = 0 mA, not switching 100 µA Active current consumption during PWM operation, one buck regulator enabled IOUT_Bx = 0 mA 15 mA Active current consumption during PWM operation, two buck regulators enabled IOUT_Bx = 0 mA 30 mA LDO regulator enabled Additional current consumption per LDO, IOUT_LDOx = 0 mA 86 µA PLL and clock detector current consumption fEXT_CLK = 1 MHz, Additional current consumption when enabled 2 mA DIGITAL INPUT SIGNALS EN, SCL, SDA, CLKIN VIL Input low level 0.4 V VIH Input high level 1.2 VHYS Hysteresis of Schmitt Trigger inputs 10 80 200 mV EN/CLKIN pulldown resistance EN_PD/CLKIN_PD = 1 500 kΩ DIGITAL OUTPUT SIGNALS nINT, SDA VOL Output low level nINT: ISOURCE = 2 mA 0.4 V SDA: ISOURCE = 20 mA 0.4 V RP External pullup resistor for nINT To VIO Supply 10 k Ω DIGITAL OUTPUT SIGNALS PGOOD, GPO, GPO2 VOL Output low level ISOURCE = 2 mA 0.4 V VOH Output high level, configured to push-pull ISINK = 2 mA VVANA – 0.4 VVANA V VPU Supply voltage for external pull-up resistor, configured to open-drain VVANA V RPU External pull-up resistor, configured to open-drain 10 k Ω ALL DIGITAL INPUTS ILEAK Input current All logic inputs over pin voltage range −1 1 µA |
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