LP87322ESLASHF datasheet(36/75 Pages) TI1

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start

MSB Chip Addr LSB

ack

MSB Register Addr LSB

ack

MSB

Data LSB

ack

stop

ack from slave

SCL

SDA

start

id = 60h

ack

addr = 40h

ack

address 40h data

stop

SCL

SDA

tLOW

trCL

tHD;DAT

tHIGH

tfCL

tSU;DAT

tSU;STA

tSU;STO

START

REPEATED

START

STOP

tHD;STA

START

tSP

trDA

tBUF

tfDA

tHD;STA

LP87322B-Q1, LP87322D-Q1, LP87322E-Q1, LP87322F-Q1

SNVSAC5 – SEPTEMBER 2017

www.ti.com

Product Folder Links: LP87322B-Q1 LP87322D-Q1 LP87322E-Q1 LP87322F-Q1

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Programming (continued)

Figure 21. I2C-Compatible Timing

8.5.1.3 Transferring Data

Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first.

Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated

by the master. The master releases the SDA line (HIGH) during the acknowledge clock pulse. The

LP87322B/D/E/F-Q1 pulls down the SDA line during the 9th clock pulse, signifying an acknowledge. The

LP87322B/D/E/F-Q1 generates an acknowledge after each byte has been received.

There is one exception to the acknowledge after every byte rule. When the master is the receiver, it must

indicate to the transmitter an end of data by not-acknowledging (negative acknowledge) the last byte clocked out

of the slave. This negative acknowledge still includes the acknowledge clock pulse (generated by the master),

but the SDA line is not pulled down.

NOTE

If the V(VANA) voltage is below VANAUVLO threshold level during I

2C communication the

LP87322B/D/E/F-Q1 device does not drive SDA line. The ACK signal and data transfer to

the master is disabled at that time.

After the START condition, the bus master sends a chip address. This address is seven bits long followed by an

eighth bit which is a data direction bit (READ or WRITE). For the eighth bit, a 0 indicates a WRITE, and a 1

indicates a READ. The second byte selects the register to which the data will be written. The third byte contains

data to write to the selected register.

Figure 22. Write Cycle (w = write; SDA = 0). Example Device Address = 0x60

LP87322E/F Datasheet(PDF) 36 Page - Texas Instruments

LP87322E/F Datasheet(HTML) 36 Page - Texas Instruments

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