LP87322ESLASHF datasheet(17/75 Pages) TI1

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POWER

GOOD

LOOP

COMP

RAMP

GENERATOR

HS FET

CURRENT

SENSE

LS FET

CURRENT

SENSE

GATE

CONTROL

IADC

VDAC

ERROR

AMP

GND

NEG

CURRENT

LIMIT

ZERO

CROSS

DETECT

POS

CURRENT

LIMIT

VIN

VOUT

CONTROL

BLOCK

PROGRAMMABLE

PARAMETERS

SLAVE

INTERFACE

VOLTAGE

SETTING

SLEW RATE

CONTROL

MASTER

INTERFACE

LP87322B-Q1, LP87322D-Q1, LP87322E-Q1, LP87322F-Q1

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SNVSAC5 – SEPTEMBER 2017

Product Folder Links: LP87322B-Q1 LP87322D-Q1 LP87322E-Q1 LP87322F-Q1

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Feature Description (continued)

•

Power Good signal (PGOOD) with selectable sources

•

Average output current sensing (for PFM entry and load current measurement)

The following parameters can be programmed via registers, the default values are set by OTP bits:

•

Output voltage

•

Forced PWM operation

•

Switch current limit

•

Output voltage slew rate

•

Enable and disable delays

There are two modes of operation for the buck converter, depending on the output current required: pulse-width

modulation (PWM) and pulse-frequency modulation (PFM). The converter operates in PWM mode at high load

currents of approximately 600 mA or higher. Lighter output current loads cause the converter to automatically

switch into PFM mode for reduced current consumption when forced PWM mode is disabled. The forced PWM

mode can be selected to maintain fixed switching frequency at all load current levels.

A block diagram of a single core is shown in Figure 6.

Figure 6. Detailed Block Diagram Showing One Core

8.3.1.2 Transition Between PWM and PFM Modes

PWM mode operation optimizes efficiency at mid to full load at the expense of light-load efficiency. The

LP87322B/D/E/F-Q1 converter operates in PWM mode at load current of about 600 mA or higher. At lighter load

current levels the device automatically switches into PFM mode for reduced current consumption when forced

PWM mode is disabled (AUTO mode operation). By combining the PFM and the PWM modes a high efficiency is

achieved over a wide output-load current range.

8.3.1.3 Buck Converter Load Current Measurement

Buck load current can be monitored via I2C registers. The monitored buck converter is selected with the

LOAD_CURRENT_BUCK_SELECT bit in SEL_I_LOAD register. A write to this selection register starts a current

measurement sequence. The regulator is automatically forced to PWM mode for the measurement period. The

measurement sequence is 50 µs long, maximum.

LP87322B/D/E/F-Q1 can be configured to give out an interrupt (I_MEAS_INT bit in INT_TOP_1 register) after the

load current measurement sequence is finished. Load current measurement interrupt can be masked with

I_MEAS_MASK bit (TOP_MASK_1 register). The measurement result can be read from registers I_LOAD_1 and

I_LOAD_2. Register I_LOAD_1 bits BUCK_LOAD_CURRENT[7:0] give out the LSB bits and register I_LOAD_2

bit BUCK_LOAD_CURRENT[8] the MSB bit. The measurement result BUCK_LOAD_CURRENT[8:0] LSB is 20

mA, and maximum code value of the measurement corresponds to 10.22 A.

LP87322E/F Datasheet(PDF) 17 Page - Texas Instruments

LP87322E/F Datasheet(HTML) 17 Page - Texas Instruments

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