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ADF5902 Datasheet(PDF) 30 Page - Analog Devices

Part # ADF5902
Description  24 GHz, ISM Band, Multichannel FMCW Radar Transmitter
PDF  39 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADF5902 Datasheet(HTML) 30 Page - Analog Devices

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ADF5902
Data Sheet
Rev. 0 | Page 30 of 39
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2
DB1
DB0
0
0
0
0
0
0
0
DSL1 DSL0
CONTROL
BITS
TR1
RD
DS11 DS10 DS9
DS8
DS7
DS6
DS5
DS4 DS3 DS2 DS1 DS0
C4(0) C3(0) C2(0) C1(0)
DELAY START WORD
C5(1)
RESERVED
DEL SEL
DS11
DS10
...
DS1
DS0
DELAY START WORD
0
0
...
0
0
0
0
0
...
0
1
1
0
0
...
1
0
2
0
0
...
1
1
3
.
.
...
.
.
.
.
.
...
.
.
.
.
.
...
.
.
.
1
1
...
0
0
4092
1
1
...
0
1
4093
1
1
...
1
0
4094
1
1
...
1
1
4095
RD
RAMP DEL
TR1
T X DATA TRIGGER
0DISABLED
1
ENABLED
0DISABLED
1
ENABLED
0
00
01
10
11
LOAD DELAY 0
LOAD DELAY 1
LOAD DELAY 2
LOAD DELAY 3
DELAY SELECT
DSL1 DSL0
0
0
0
Figure 41. Register 16 (R16)
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2
DB1
DB0
00
00
0
0
0
0
C4(0) C3(0) C2(0) C1(1)
CONTROL
BITS
RESERVED
C5(1)
0
0
0
000
0
0
0
0
0
0
0
0
00
00
0
Figure 42. Register 17 (R17)
REGISTER 16
Control Bits
With Bits[C5:C1] set to 10000, Register R16 is programmed.
Figure 41 shows the input data format for programming this
register.
Reserved
Bits[DB31:DB25], Bits[DB22:DB21], and Bits[DB18:DB17] are
reserved and must be set as shown in Figure 41.
Delay Select
Bits[DB24:DB23] select the delay word to be loaded.
TX_DATA Trigger
When Bit DB20 is set to 1, a logic high on the TX_DATA pin
activates the ramp in conjunction with Bit DB29 of Register 5.
Synchronize the active edge of the pulse applied to the TX_
DATA pin to the rising edge of the REFIN reference input.
The pulse duration applied to the TX_DATA pin must be a
minimum width of 4 × 1/fPFD, where fPFD is the phase frequency
detector (PFD) frequency.
When Bit DB20 is set to 0, this function is disabled.
When activating continuous triangular or continuous sawtooth
ramps, a pulse applied to the TX_DATA pin is required after
Bit DB29 of Register 5 is toggled high. To stop the continuous
triangular or sawtooth ramps, a TX_DATA pulse is required
after Bit DB29 of Register 5 is toggled low.
When Bit DB20 is set to 0, this function is disabled.
Ramp Delay
When Bit DB19 is set to 1, the delay between ramps function is
enabled. When Bit DB19 is set to 0, this function is disabled.
12-Bit Delay Word
Bits[DB16:DB5] determine the delay word. The delay word
determines the duration of the ramp start delay.
REGISTER 17
The bits in Register 17 are reserved and must be programmed
as described in Figure 42 using a hexadecimal word of
0x00000011.



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