Data Sheet

ADF5902

Rev. 0 | Page 29 of 39

DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2

DB1

DB0

0

SS1

SS0 SW19

CONTROL

BITS

SW18 SW17 SW16 SW15 SW14 SW13 SW12 SW11 SW10 SW9

SW8 SW7

SW6 SW5 SW4 SW3 SW2 SW1 SW0

C4(1) C3(1) C2(1) C1(1)

STEP WORD

C5(0)

STEP

SEL

00

0

0

RESERVED

...

STEP WORD

0

0

...

0

0

0

00

...

01

1

00

...

10

2

00

...

11

3

..

...

..

.

..

...

..

.

..

...

..

.

1

1

...

0

0

1,048,572

1

1

...

0

1

1,048,573

1

1

...

1

0

1,048,574

1

1

...

1

1

1,048,575

SW19 SW18

SW1

SW0

00

01

10

11

LOAD STEP 0

LOAD STEP 1

LOAD STEP 2

LOAD STEP 3

STEP SEL

SS1

SS0

Figure 40. Register 15 (R15)

REGISTER 15

Control Bits

With Bits[C5:C1] set to 01111, Register R15 is programmed.

Figure 40 shows the input data format for programming this

register.

Reserved

Bits[DB31:DB27] are reserved and must be set as shown in

Figure 40.

Step Select

Bits[DB26:DB25] select the step word to be loaded (see Figure 40).

20-Bit Step Word

Bits[DB22:DB3] determine the step word. The step word is the

number of steps in the ramp (see the Ramp and Modulation

section).