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HD64F2145 Datasheet(PDF) 162 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 162 Page - Renesas Technology Corp |
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162 / 829 page ![]() Rev. 2.0, 08/02, page 122 of 788 6.5.3 Basic Operation Timing 8-Bit, 2-State Access Space: Figure 6.5 shows the bus timing for an 8-bit, 2-state access space. When an 8-bit access space is accessed, the upper half (D15 to D8) of the data bus is used. Wait states cannot be inserted. Bus cycle T 1 T 2 Address bus Ø / (IOSE = 1) / (IOSE = 0) D15 to D8 Valid D7 to D0 Invalid Read D15 to D8 Valid Write Figure 6.5 Bus Timing for 8-Bit, 2-State Access Space |
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