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HD64F2145 Datasheet(PDF) 172 Page - Renesas Technology Corp

Part # HD64F2145
Description  Hitachi 16-Bit Single-Chip Microcomputer
PDF  829 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2145 Datasheet(HTML) 172 Page - Renesas Technology Corp

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Rev. 2.0, 08/02, page 132 of 788
T
1
Address bus
Ø
/
Data bus
T
2
T
3
T
1
T
2
T
1
Full access
T
2
Burst access
Only lower address changes
Read data
Read data
Read data
(IOSE = 0)
Figure 6.14 Access Timing Example in Burst ROM Space (AST = BRSTS1 = 1)
T
1
Address bus
Ø
Data bus
T
2
T
1
T
1
Full access
Burst access
Only lower
address changes
Read data
Read data Read data
/
(IOSE = 0)
Figure 6.15 Access Timing Example in Burst ROM Space (AST = BRSTS1 = 0)
6.6.2
Wait Control
As with the basic bus interface, program wait insertion or pin wait insertion using the
:$,7 pin
can be used in the initial cycle (full access) of the burst ROM interface. For details, see section
6.5.4, Wait Control. Wait states cannot be inserted in a burst cycle.



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