HD64F2145 datasheet(213/829 Pages) RENESAS

213 / 829 page

Rev. 2.0, 08/02, page 173 of 788

• P42/TMRI0/SCK2/SDA1

The pin function is switched as shown below according to the combination of the ICE bit in

ICCR of IIC1, the CKE1 and CKE0 bits in SCR of SCI_2, the C/

$ bit in SMR of SCI_2, and

the P42DDR bit.

ICE

CKE1

—

CKE0

—

P42DDR

—

P42 input

P42 output

SCK2 output

SCK2 input

SDA1

I/O pin

Pin Function

TMRI0 input pin*

Note:* When this pin is used as the SDA1 I/O pin, bits CKE1 and CKE0 in SCR of SCI_2 and bit

$ in SMR of SCI_2 must all be cleared to 0. SDA1 is an NMOS-only output, and has

direct bus drive capability.

When bits CCLR1 and CCLR0 in TCR0 of TMR_0 are set to 1, this pin is used as the

TMRI0 input pin.

When the P42 output pin and SCK2 output pin are set, the output type is NMOS push-pull

output.

• P41/TMO0/RxD2/IrRxD

The pin function is switched as shown below according to the combination of the OS3 to OS0

bits in TCSR of TMR0, the RE bit in SCR of SCI_2 and the P41DDR bit.

OS3 to OS0

All 0

Not all 0

P41DDR

—

Pin Function

P41

input pin

P41

output pin

RxD2/IrRxD

input pin

TMO0

output pin

Note:* When this pin is used as the TMO0 output pin, bit RE in SCR of SCI_2 must be cleared to

HD64F2145 Datasheet(PDF) 213 Page - Renesas Technology Corp

HD64F2145 Datasheet(HTML) 213 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL