HD64F2145 datasheet(210/829 Pages) RENESAS

210 / 829 page

Rev. 2.0, 08/02, page 170 of 788

8.5.1

Port 4 Data Direction Register (P4DDR)

P4DDR specifies input or output for the pins of port 4 on a bit-by-bit basis.

Bit

Bit Name

Initial Value

R/W

Description

P47DDR

P46DDR

P45DDR

P44DDR

P43DDR

P42DDR

P41DDR

P40DDR

When a bit in P4DDR is set to 1, the corresponding

pin functions as an output port, and when cleared to

0, as an input port.

As 14-bit PWM and SCI_2 are initialized in software

standby mode, the pin states are determined by the

TMR_0, TMR_1, XBS, IIC_1, P4DDR, and P4DR

specifications.

8.5.2

Port 4 Data Register (P4DR)

P4DR stores output data for port 4.

Bit

Bit Name

Initial Value

R/W

Description

P47DR

R/W

P46DR

R/W

P45DR

R/W

P44DR

R/W

P43DR

R/W

P42DR

R/W

P41DR

R/W

P40DR

R/W

If a port 4 read is performed while P4DDR bits are

set to 1, the P4DR values are read directly,

regardless of the actual pin states. If a port 4 read is

performed while P4DDR bits are cleared to 0, the

pin states are read.

HD64F2145 Datasheet(PDF) 210 Page - Renesas Technology Corp

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