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HD64F2145 Datasheet(PDF) 272 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 272 Page - Renesas Technology Corp |
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272 / 829 page ![]() Rev. 2.0, 08/02, page 232 of 788 10.3.3 PWM (D/A) Control Register (DACR) DACR selects test mode, enables the PWM outputs, and selects the output phase and operating speed. Bit Bit Name Initial Value R/W Description 7 TEST 0 R/W Test Mode Selects test mode, which is used in testing this LSI. Normally this bit should be cleared to 0. 0: PWM (D/A) in user state: Normal operation 1: PWM (D/A) in test state: Correct conversion results unobtainable 6 PWME 0 R/W PWM Enable Starts or stops the PWM D/A counter (DACNT). 0: DACNT operates as a 14-bit up-counter 1: DACNT halts at H'0003 5 4 — — 1 1 R R Reserved These bits are always read as 1 and cannot be modified. 3 OEB 0 R/W Output Enable B Enables or disables output on PWM (D/A) channel B. 0: PWM (D/A) channel B output (at the PWX1 pin) is disabled 1: PWM (D/A) channel B output (at the PWX1 pin) is enabled |
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