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HD64F2145 Datasheet(PDF) 269 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 269 Page - Renesas Technology Corp |
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269 / 829 page  Rev. 2.0, 08/02, page 229 of 788 15 7 DACNTH DACNTL 14 6 13 5 12 4 11 3 10 2 9 1 8 0 7 8 6 9 5 10 4 11 3 12 2 13 1 - 0 - Bit (CPU) Bit (Counter) : : - REGS • DACNTH Bit Bit Name Initial Value R/W Description 7 to 0 UC7 to UC0 All 0 R/W Upper Up-Counter • DACNTL Bit Bit Name Initial Value R/W Description 7 to 2 UC8 to UC13 All 0 R/W Lower Up-Counter 1— 1 R Reserved This bit is always read as 1 and cannot be modified. 0 REGS 1 R/W Register Select DADRA and DACR, and DADRB and DACNT, are located at the same addresses. The REGS bit specifies which registers can be accessed. 0: DADRA and DADRB can be accessed 1: DACR and DACNT can be accessed |
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