HD64F2145 datasheet(298/829 Pages) RENESAS

Part #	HD64F2145

Description	Hitachi 16-Bit Single-Chip Microcomputer

PDF	829 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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298 / 829 page

Rev. 2.0, 08/02, page 258 of 788

11.5.7

Timing of Output Compare Flag (OCF) setting

The output compare flag, OCFA or OCFB, is set to 1 by a compare-match signal generated when

the FRC value matches the OCRA or OCRB value. This compare-match signal is generated at the

last state in which the two values match, just before FRC increments to a new value. When the

FRC and OCRA or OCRB value match, the compare-match signal is not generated until the next

cycle of the clock source. Figure 11.12 shows the timing of setting the OCFA or OCFB flag.

Compare-match

signal

OCFA, OCFB

OCRA, OCRB

FRC

N + 1

Figure 11.12 Timing of Output Compare Flag (OCFA or OCFB) Setting

11.5.8

Timing of FRC Overflow Flag Setting

The FRC overflow flag (OVF) is set to 1 when FRC overflows (changes from H'FFFF to H'0000).

Figure 11.13 shows the timing of setting the OVF flag.

Overflow signal

FRC

H'FFFF

H'0000

OVF

Figure 11.13 Timing of Overflow Flag (OVF) Setting

HD64F2145 Datasheet(PDF) 298 Page - Renesas Technology Corp