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HD64F2145 Datasheet(PDF) 300 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 300 Page - Renesas Technology Corp |
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300 / 829 page ![]() Rev. 2.0, 08/02, page 260 of 788 Compare-match signal Input capture mask signal ICRD + OCRDM × 2 N FRC N N + 1 ø Figure 11.16 Timing of Input Capture Mask Signal Clearing 11.6 Interrupt Sources The free-running timer can request seven interrupts: ICIA to ICID, OCIA, OCIB, and FOVI. Each interrupt can be enabled or disabled by an enable bit in TIER. Independent signals are sent to the interrupt controller for each interrupt. Table 11.2 lists the sources and priorities of these interrupts. The ICIA, ICIB, OCIA, and OCIB interrupts can be used as the on-chip DTC activation sources. Table 11.2 FRT Interrupt Sources Interrupt Interrupt Source Interrupt Flag DTC Activation Priority ICIA Input capture of ICRA ICFA Enabled High ICIB Input capture of ICRB ICFB Enabled ICIC Input capture of ICRC ICFC Disabled ICID Input capture of ICRD ICFD Disabled OCIA Compare match of OCRA OCFA Enabled OCIB Compare match of OCRB OCFB Enabled FOVI Overflow of FRC OVF Disabled Low |
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